From 4f69ab729a9e0fe929728c5726e78f7769fe5a3a Mon Sep 17 00:00:00 2001 From: Felix Held Date: Wed, 10 Feb 2021 01:26:07 +0100 Subject: soc/amd*/smihandler: factor out and rename clear_all_smi_status The old name was misleading, since it doesn't disable the generation of SMIs, but clears the status registers. Signed-off-by: Felix Held Change-Id: Iddadbec013091c2e5993a6303e291451c3d1e7ce Reviewed-on: https://review.coreboot.org/c/coreboot/+/50459 Reviewed-by: Marshall Dawson Reviewed-by: Raul Rangel Tested-by: build bot (Jenkins) --- src/soc/amd/picasso/smihandler.c | 13 +------------ 1 file changed, 1 insertion(+), 12 deletions(-) (limited to 'src/soc/amd/picasso') diff --git a/src/soc/amd/picasso/smihandler.c b/src/soc/amd/picasso/smihandler.c index d6c3ed0a41..5134358cb7 100644 --- a/src/soc/amd/picasso/smihandler.c +++ b/src/soc/amd/picasso/smihandler.c @@ -123,17 +123,6 @@ static void sb_apmc_smi_handler(void) mainboard_smi_apmc(cmd); } -static void disable_all_smi_status(void) -{ - smi_write32(SMI_SCI_STATUS, smi_read32(SMI_SCI_STATUS)); - smi_write32(SMI_EVENT_STATUS, smi_read32(SMI_EVENT_STATUS)); - smi_write32(SMI_REG_SMISTS0, smi_read32(SMI_REG_SMISTS0)); - smi_write32(SMI_REG_SMISTS1, smi_read32(SMI_REG_SMISTS1)); - smi_write32(SMI_REG_SMISTS2, smi_read32(SMI_REG_SMISTS2)); - smi_write32(SMI_REG_SMISTS3, smi_read32(SMI_REG_SMISTS3)); - smi_write32(SMI_REG_SMISTS4, smi_read32(SMI_REG_SMISTS4)); -} - static void sb_slp_typ_handler(void) { uint32_t pci_ctrl, reg32; @@ -172,7 +161,7 @@ static void sb_slp_typ_handler(void) wbinvd(); - disable_all_smi_status(); + clear_all_smi_status(); /* Do not send SMI before AcpiPm1CntBlkx00[SlpTyp] */ pci_ctrl = pm_read32(PM_PCI_CTRL); -- cgit v1.2.3