From 13831223bec0fada21a703fa23b06663942f11de Mon Sep 17 00:00:00 2001 From: Fred Reitberger Date: Mon, 17 Oct 2022 11:49:55 -0400 Subject: soc/amd/*/i2c: Move reset_i2c_peripherals to i2c.c Move i2c SoC related code from early_fch.c to i2c.c TEST=build boards for each SoC Signed-off-by: Fred Reitberger Change-Id: I69d4b32cf95ce74586bd8971c7ee4b56c1c2fc04 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68499 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held Reviewed-by: Jason Glenesk Reviewed-by: Matt DeVillier --- src/soc/amd/picasso/early_fch.c | 18 ------------------ src/soc/amd/picasso/i2c.c | 18 ++++++++++++++++++ src/soc/amd/picasso/include/soc/i2c.h | 1 + 3 files changed, 19 insertions(+), 18 deletions(-) (limited to 'src/soc/amd/picasso') diff --git a/src/soc/amd/picasso/early_fch.c b/src/soc/amd/picasso/early_fch.c index d0c10f2589..f5d392c9f6 100644 --- a/src/soc/amd/picasso/early_fch.c +++ b/src/soc/amd/picasso/early_fch.c @@ -14,30 +14,12 @@ #include "chip.h" -/* Table to switch SCL pins to outputs to initially reset the I2C peripherals */ -static const struct soc_i2c_scl_pin i2c_scl_pins[] = { - I2C_RESET_SCL_PIN(I2C2_SCL_PIN, GPIO_I2C2_SCL), - I2C_RESET_SCL_PIN(I2C3_SCL_PIN, GPIO_I2C3_SCL), - /* I2C4 is a peripheral device only */ -}; - static void lpc_configure_decodes(void) { if (CONFIG(POST_IO) && (CONFIG_POST_IO_PORT == 0x80)) lpc_enable_port80(); } -static void reset_i2c_peripherals(void) -{ - const struct soc_amd_picasso_config *cfg = config_of_soc(); - struct soc_i2c_peripheral_reset_info reset_info; - - reset_info.i2c_scl_reset_mask = cfg->i2c_scl_reset & GPIO_I2C_MASK; - reset_info.i2c_scl = i2c_scl_pins; - reset_info.num_pins = ARRAY_SIZE(i2c_scl_pins); - sb_reset_i2c_peripherals(&reset_info); -} - /* Before console init */ void fch_pre_init(void) { diff --git a/src/soc/amd/picasso/i2c.c b/src/soc/amd/picasso/i2c.c index afbc8bd379..d71843658b 100644 --- a/src/soc/amd/picasso/i2c.c +++ b/src/soc/amd/picasso/i2c.c @@ -9,6 +9,13 @@ #include #include "chip.h" +/* Table to switch SCL pins to outputs to initially reset the I2C peripherals */ +static const struct soc_i2c_scl_pin i2c_scl_pins[] = { + I2C_RESET_SCL_PIN(I2C2_SCL_PIN, GPIO_I2C2_SCL), + I2C_RESET_SCL_PIN(I2C3_SCL_PIN, GPIO_I2C3_SCL), + /* I2C4 is a peripheral device only */ +}; + #if ENV_X86 /* Preferably keep all the I2C controllers operating in a specific mode together. */ static const struct soc_i2c_ctrlr_info i2c_ctrlr[I2C_CTRLR_COUNT] = { @@ -38,6 +45,17 @@ void i2c_set_bar(unsigned int bus, uintptr_t bar) } #endif +void reset_i2c_peripherals(void) +{ + const struct soc_amd_picasso_config *cfg = config_of_soc(); + struct soc_i2c_peripheral_reset_info reset_info; + + reset_info.i2c_scl_reset_mask = cfg->i2c_scl_reset & GPIO_I2C_MASK; + reset_info.i2c_scl = i2c_scl_pins; + reset_info.num_pins = ARRAY_SIZE(i2c_scl_pins); + sb_reset_i2c_peripherals(&reset_info); +} + void soc_i2c_misc_init(unsigned int bus, const struct dw_i2c_bus_config *cfg) { /* TODO: Picasso supports I2C RX pad configurations 3.3V, 1.8V and off, so make this diff --git a/src/soc/amd/picasso/include/soc/i2c.h b/src/soc/amd/picasso/include/soc/i2c.h index f62cb11dc4..70562722ff 100644 --- a/src/soc/amd/picasso/include/soc/i2c.h +++ b/src/soc/amd/picasso/include/soc/i2c.h @@ -25,5 +25,6 @@ /* Sets the base address for the specific I2C bus. */ void i2c_set_bar(unsigned int bus, uintptr_t bar); +void reset_i2c_peripherals(void); #endif /* AMD_PICASSO_I2C_H */ -- cgit v1.2.3