From 1532d1c4073107370ddd4a3c4db6945c54bfb330 Mon Sep 17 00:00:00 2001
From: Felix Held <felix-coreboot@felixheld.de>
Date: Tue, 15 Jun 2021 16:01:44 +0200
Subject: soc/amd/cezanne,picasso: add AOAC offset define for the eMMC
 controller

BUG=b:184978118

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I03554a151aa6a6d9e15d74c63cd02239b788808a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55530
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
---
 src/soc/amd/picasso/include/soc/southbridge.h | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/soc/amd/picasso/include')

diff --git a/src/soc/amd/picasso/include/soc/southbridge.h b/src/soc/amd/picasso/include/soc/southbridge.h
index b623ed382e..e9d891ca15 100644
--- a/src/soc/amd/picasso/include/soc/southbridge.h
+++ b/src/soc/amd/picasso/include/soc/southbridge.h
@@ -130,6 +130,7 @@
 #define FCH_AOAC_DEV_AMBA		17
 #define FCH_AOAC_DEV_UART3		26
 #define FCH_AOAC_DEV_ESPI		27
+#define FCH_AOAC_DEV_EMMC		28
 
 #define FCH_LEGACY_UART_DECODE		(ALINK_AHB_ADDRESS + 0x20) /* 0xfedc0020 */
 
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