From 27b6b0ed72bbb7ba36096a5c278a416b0bc84f65 Mon Sep 17 00:00:00 2001 From: Raul E Rangel Date: Tue, 10 Mar 2020 14:05:42 -0600 Subject: soc/amd/picasso/acpi: Remove hardcoded FCH IRQ numbers Modify the FCH ACPI devices to query the PCI IRQ mapping registers for their current IRQ numbers. BUG=b:139429446, b:154756391 TEST=Boot trembyle and see that I2C and UART devices are finally functional. Signed-off-by: Raul E Rangel Change-Id: I8f2035f74240ead4089ff4d503dfbeb447cf8de4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41835 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh --- src/soc/amd/picasso/acpi/pcie.asl | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) (limited to 'src/soc/amd/picasso/acpi/pcie.asl') diff --git a/src/soc/amd/picasso/acpi/pcie.asl b/src/soc/amd/picasso/acpi/pcie.asl index 2bbfec56e4..561a3f8140 100644 --- a/src/soc/amd/picasso/acpi/pcie.asl +++ b/src/soc/amd/picasso/acpi/pcie.asl @@ -16,6 +16,21 @@ PIRG, 0x00000008, /* Index 6: INTG */ PIRH, 0x00000008, /* Index 7: INTH */ + Offset (0x62), + PGPI, 0x00000008, /* Index 0x62: GPIO */ + + Offset (0x70), + PI20, 0x00000008, /* Index 0x70: I2C0 */ + PI21, 0x00000008, /* Index 0x71: I2C1 */ + PI22, 0x00000008, /* Index 0x72: I2C2 */ + PI23, 0x00000008, /* Index 0x73: I2C3 */ + PUA0, 0x00000008, /* Index 0x74: UART0 */ + PUA1, 0x00000008, /* Index 0x75: UART1 */ + PI24, 0x00000008, /* Index 0x76: I2C4 */ + PI25, 0x00000008, /* Index 0x77: I2C5 */ + PUA2, 0x00000008, /* Index 0x78: UART2 */ + PUA3, 0x00000008, /* Index 0x79: UART3 */ + /* IO-APIC IRQs */ Offset (0x80), IORA, 0x00000008, /* Index 0x80: INTA */ @@ -26,6 +41,21 @@ IORF, 0x00000008, /* Index 0x85: INTF */ IORG, 0x00000008, /* Index 0x86: INTG */ IORH, 0x00000008, /* Index 0x87: INTH */ + + Offset (0xE2), + IGPI, 0x00000008, /* Index 0xE2: GPIO */ + + Offset (0xF0), + II20, 0x00000008, /* Index 0xF0: I2C0 */ + II21, 0x00000008, /* Index 0xF1: I2C1 */ + II22, 0x00000008, /* Index 0xF2: I2C2 */ + II23, 0x00000008, /* Index 0xF3: I2C3 */ + IUA0, 0x00000008, /* Index 0xF4: UART0 */ + IUA1, 0x00000008, /* Index 0xF5: UART1 */ + II24, 0x00000008, /* Index 0xF6: I2C4 */ + II25, 0x00000008, /* Index 0xF7: I2C5 */ + IUA2, 0x00000008, /* Index 0xF8: UART2 */ + IUA3, 0x00000008, /* Index 0xF9: UART3 */ } /* PCI Error control register */ -- cgit v1.2.3