From cff479e930c20d56312c8f041d1e4f3318293b03 Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Wed, 8 Jul 2020 15:47:19 -0700 Subject: soc/amd/picasso: Add driver for handling PCIE GPP bridges This change adds a driver pcie_gpp.c which provides device_operations for external and internal PCIe GPP bridges. These device operations include standard PCI bridge operations as well as operations for generating ACPI node for the device and returning appropriate ACPI name for it. Signed-off-by: Furquan Shaikh Change-Id: I9f8809c2735bdc09435deda91a570c89e71e8062 Reviewed-on: https://review.coreboot.org/c/coreboot/+/43312 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/amd/picasso/Makefile.inc | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/amd/picasso/Makefile.inc') diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index 593d17b82d..b6c0ddb915 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -78,6 +78,7 @@ ramstage-y += fsp_params.c ramstage-y += config.c ramstage-y += update_microcode.c ramstage-y += graphics.c +ramstage-y += pcie_gpp.c smm-y += smihandler.c smm-y += smi_util.c -- cgit v1.2.3