From 9c55ee34acb9007f8152f4ceddea8c44df29ba75 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Mon, 22 Jul 2019 09:34:50 +0300 Subject: soc/amd/picasso: Set HAVE_BOOTBLOCK=n MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Iaf370e04adb04eb81555a57e81812ebe3339971d Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/34478 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Aaron Durbin Reviewed-by: Marshall Dawson --- src/soc/amd/picasso/Makefile.inc | 7 ------- 1 file changed, 7 deletions(-) (limited to 'src/soc/amd/picasso/Makefile.inc') diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index 93a8bbbbf2..7f371928c1 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -37,13 +37,6 @@ subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/pae subdirs-y += ../../../cpu/x86/smm -# TODO: Make coreboot modifications so bootblock can be removed. This soc -# also selects C_ENVIRONMENT_BOOTBLOCK to enforce certain codepaths -# in romstage. As a result, the bootblock build also needs a -# dummy cache_as_ram.S -bootblock-y += cache_as_ram.S -bootblock-y += bootblock/bootblock.c - romstage-y += i2c.c romstage-y += romstage.c romstage-y += gpio.c -- cgit v1.2.3