From 9065f4f8ed2facb60df3f4906b8e1e66e8958379 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Sat, 21 Nov 2020 02:12:54 +0100 Subject: soc/amd: move non-CAR linker scripts to common directory AMD family 17h and newer don't use cache as RAM, since the RAM is already initialized by the PSP when the x86 cores are released from reset. Therefore they use a different linker script as the rest of the x86 chips in coreboot do. Since there will be support for newer generations than Picasso will be added, move those linker scripts from soc/amd/picasso to soc/amd/common/block/cpu/noncar. TEST=Timeless build of amd/mandolin and amd/gardenia result in identical binaries. Change-Id: Ie60372aa498b6e505708f97213b502c9d0b3534b Signed-off-by: Felix Held Reviewed-on: https://review.coreboot.org/c/coreboot/+/47828 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson --- src/soc/amd/picasso/Kconfig | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) (limited to 'src/soc/amd/picasso/Kconfig') diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index 4d7d2a6c1a..6fa36641cd 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -29,6 +29,7 @@ config CPU_SPECIFIC_OPTIONS select TSC_SYNC_LFENCE select UDELAY_TSC select SOC_AMD_COMMON + select SOC_AMD_COMMON_BLOCK_NONCAR select SOC_AMD_COMMON_BLOCK_HAS_ESPI select SOC_AMD_COMMON_BLOCK_IOMMU select SOC_AMD_COMMON_BLOCK_ACPIMMIO @@ -57,10 +58,6 @@ config CPU_SPECIFIC_OPTIONS select SUPPORT_CPU_UCODE_IN_CBFS select ACPI_NO_SMI_GNVS -config MEMLAYOUT_LD_FILE - string - default "src/soc/amd/picasso/memlayout.ld" - config EARLY_RESERVED_DRAM_BASE hex default 0x2000000 -- cgit v1.2.3