From 9ceac74a51e5c46c5bdec1e295a31dd78ff62a21 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Wed, 8 Feb 2023 14:26:02 -0700 Subject: soc/amd(MDN/PHX/Glinda): Update DISABLE_KEYBOARD_RESET_PIN help For MDN, PHX, & Glinda platforms, the Keyboard Reset functionality has been moved from GPIO 129 to GPIO 21. Additionally, the issue where the system would reset when the KBDRST_L pin went low even when not configured for Keyboard reset seems to have been fixed, so remove that text. Signed-off-by: Martin Roth Change-Id: Iefe7e00d63777577b59ee98cb974b07afea1fd12 Reviewed-on: https://review.coreboot.org/c/coreboot/+/72912 Reviewed-by: Jon Murphy Tested-by: build bot (Jenkins) Reviewed-by: Eric Lai --- src/soc/amd/phoenix/Kconfig | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) (limited to 'src/soc/amd/phoenix') diff --git a/src/soc/amd/phoenix/Kconfig b/src/soc/amd/phoenix/Kconfig index 37a2fc9c4c..03cf8366ff 100644 --- a/src/soc/amd/phoenix/Kconfig +++ b/src/soc/amd/phoenix/Kconfig @@ -295,10 +295,7 @@ config DISABLE_SPI_FLASH_ROM_SHARING config DISABLE_KEYBOARD_RESET_PIN bool help - Instruct the SoC to not use the state of GPIO_129 as keyboard reset - signal. When this pin is used as GPIO and the keyboard reset - functionality isn't disabled, configuring it as an output and driving - it as 0 will cause a reset. + Instruct the SoC to not to reset based on the state of GPIO_21, KBDRST_L. config ACPI_SSDT_PSD_INDEPENDENT bool "Allow core p-state independent transitions" -- cgit v1.2.3