From 0507e069b0dbed132762f6423ba298db3b34e4e7 Mon Sep 17 00:00:00 2001 From: Karthikeyan Ramasubramanian Date: Thu, 1 Jun 2023 14:45:41 -0600 Subject: soc|vc/amd/phoenix: Prepare for PSP verstage Update all the required sources to lay the ground work to enable PSP verstage. BUG=b:284984667 TEST=Build Myst BIOS image with PSP verstage enabled. Change-Id: I6fbb1f835ac2ad6ff47f843321e1bd380af7ce33 Signed-off-by: Karthikeyan Ramasubramanian Reviewed-on: https://review.coreboot.org/c/coreboot/+/75584 Reviewed-by: Tim Van Patten Tested-by: build bot (Jenkins) Reviewed-by: Martin L Roth --- src/soc/amd/phoenix/include/soc/psp_verstage_addr.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/soc/amd/phoenix/include') diff --git a/src/soc/amd/phoenix/include/soc/psp_verstage_addr.h b/src/soc/amd/phoenix/include/soc/psp_verstage_addr.h index ee9dedad46..30f65f652d 100644 --- a/src/soc/amd/phoenix/include/soc/psp_verstage_addr.h +++ b/src/soc/amd/phoenix/include/soc/psp_verstage_addr.h @@ -1,7 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -/* TODO: Update for Phoenix */ - #ifndef AMD_PHOENIX_PSP_VERSTAGE_ADDR_H #define AMD_PHOENIX_PSP_VERSTAGE_ADDR_H -- cgit v1.2.3