From 12a448224f512deba57221c0757f148e626240e0 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Fri, 2 Jun 2023 15:30:50 +0200 Subject: soc/amd/*/root_complex: reserve IOMMU MMIO area This makes sure that the resource allocator won't use this address range for anything else. In the systems I looked at, this was between the end of the above 4GB memory and the beginning of the above 4GB PCI BAR MMIO region, but better reserve it here so nothing else will get allocated there if this expectation isn't met. TEST=Reserved region is printed in the console logs: update_constraints: PCI: 00:00.0 09 base fd00000000 limit fdffffffff mem (fixed) Signed-off-by: Felix Held Change-Id: I5a8150873cb019ca1d903ed269e18d6f9fabb871 Reviewed-on: https://review.coreboot.org/c/coreboot/+/75611 Tested-by: build bot (Jenkins) Reviewed-by: Eric Lai Reviewed-by: Arthur Heymans --- src/soc/amd/mendocino/root_complex.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/soc/amd/mendocino') diff --git a/src/soc/amd/mendocino/root_complex.c b/src/soc/amd/mendocino/root_complex.c index 7a58f015e6..0dcf2b8a02 100644 --- a/src/soc/amd/mendocino/root_complex.c +++ b/src/soc/amd/mendocino/root_complex.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -194,6 +195,9 @@ static void read_resources(struct device *dev) gnb_apic->size = 0x00001000; gnb_apic->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; + /* Reserve fixed IOMMU MMIO region */ + mmio_range(dev, idx++, IOMMU_RESERVED_MMIO_BASE, IOMMU_RESERVED_MMIO_SIZE); + if (fsp_hob_iterator_init(&hob_iterator) != CB_SUCCESS) { printk(BIOS_ERR, "%s incomplete because no HOB list was found\n", __func__); -- cgit v1.2.3