From bcb610a5595f7ff99129dfbaff9c6b4e1b5c3584 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Sat, 29 Oct 2022 13:31:54 -0600 Subject: soc/amd: Specify memory types supported by each chip This change disables support for memory types not used by each of the chips. This will in turn remove the files for those memory types from the platform builds. Signed-off-by: Martin Roth Change-Id: I8c7f47b43d8d4a89630fbd645a725e61d74bc2a5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68994 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons Reviewed-by: Sean Rhodes Reviewed-by: Felix Held --- src/soc/amd/glinda/Kconfig | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'src/soc/amd/glinda') diff --git a/src/soc/amd/glinda/Kconfig b/src/soc/amd/glinda/Kconfig index c11ece9ca3..9e990992a8 100644 --- a/src/soc/amd/glinda/Kconfig +++ b/src/soc/amd/glinda/Kconfig @@ -31,6 +31,10 @@ config SOC_SPECIFIC_OPTIONS select HAVE_FSP_GOP select HAVE_SMI_HANDLER select IDT_IN_EVERY_STAGE + select NO_DDR4 + select NO_DDR3 + select NO_DDR2 + select NO_LPDDR4 select PARALLEL_MP_AP_WORK select PLATFORM_USES_FSP2_0 select PROVIDES_ROM_SHARING @@ -81,6 +85,7 @@ config SOC_SPECIFIC_OPTIONS select SOC_AMD_COMMON_FSP_PCI # TODO: Check if this is still correct select SSE2 select UDK_2017_BINDING + select USE_DDR5 select USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM select USE_FSP_NOTIFY_PHASE_READY_TO_BOOT select USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE -- cgit v1.2.3