From b56ea2503f77f8c9962c55e65447030e657408f7 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Wed, 31 May 2023 16:25:30 +0200 Subject: soc/amd/glinda/chip: use common data fabric domain resource code Use the new common AMD code that gets the usable non-fixed MMIO windows from the data fabric MMIO decode registers and generate the PCI0 _CRS ACPI code based on those regions. For a more detailed description see the corresponding patch that changes the Picasso code to use this new code. In contrast to the Picasso code, this change will drop the unneeded _STA method inside the PCI0 scope which wasn't present in Picasso's ACPI code before it got replaced by the SSDT that gets generated by amd_pci_domain_fill_ssdt. TEST=None Signed-off-by: Felix Held Change-Id: I948d882b2e2c6d19f73c0be094e4ff6e42ec81d6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/75560 Reviewed-by: Raul Rangel Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/soc/amd/glinda/chip.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'src/soc/amd/glinda/chip.c') diff --git a/src/soc/amd/glinda/chip.c b/src/soc/amd/glinda/chip.c index 65c9e196bc..47794e6da5 100644 --- a/src/soc/amd/glinda/chip.c +++ b/src/soc/amd/glinda/chip.c @@ -28,10 +28,11 @@ static const char *soc_acpi_name(const struct device *dev) }; struct device_operations glinda_pci_domain_ops = { - .read_resources = pci_domain_read_resources, + .read_resources = amd_pci_domain_read_resources, .set_resources = pci_domain_set_resources, - .scan_bus = pci_domain_scan_bus, + .scan_bus = amd_pci_domain_scan_bus, .acpi_name = soc_acpi_name, + .acpi_fill_ssdt = amd_pci_domain_fill_ssdt, }; static void soc_init(void *chip_info) -- cgit v1.2.3