From 6d3682ee9b19b9e6833f38046891132be665c93c Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Thu, 13 Jul 2023 12:34:04 +0200 Subject: soc/amd/genoa: Add minimal viable code for compilation This adds a dummy soc (genoa) based on EXAMPLE_MIN86 with amd linker script hooked up. Default to 64bit code as that will be a sensible default for this platform (high memory access required for RAS setup). Signed-off-by: Arthur Heymans Change-Id: I69253466084d17c4359d7e824d69f12490b076e4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/76495 Reviewed-by: Martin L Roth Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson --- src/soc/amd/genoa/timer.c | 7 +++++++ 1 file changed, 7 insertions(+) create mode 100644 src/soc/amd/genoa/timer.c (limited to 'src/soc/amd/genoa/timer.c') diff --git a/src/soc/amd/genoa/timer.c b/src/soc/amd/genoa/timer.c new file mode 100644 index 0000000000..9054ffd972 --- /dev/null +++ b/src/soc/amd/genoa/timer.c @@ -0,0 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +void init_timer(void) +{ +} -- cgit v1.2.3