From aa9ad0544908761248e9ea9bd5d44e3d0d6b90ea Mon Sep 17 00:00:00 2001 From: Felix Held Date: Wed, 4 Aug 2021 01:57:38 +0200 Subject: soc/amd/common/block/gpio_banks: factor out gpio_mux_ptr This aligns the GPIO MUX access more with the GPIO control register access and will facilitate adding support for the remote GPIO bank. Also change the GPIO number argument type to gpio_t. Signed-off-by: Felix Held Change-Id: I4054656c5cc23ea942e8dd370fbbffca304755d6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56787 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/soc/amd/common/block/gpio_banks/gpio.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) (limited to 'src/soc/amd/common') diff --git a/src/soc/amd/common/block/gpio_banks/gpio.c b/src/soc/amd/common/block/gpio_banks/gpio.c index f32558aa59..7f5b4b6b94 100644 --- a/src/soc/amd/common/block/gpio_banks/gpio.c +++ b/src/soc/amd/common/block/gpio_banks/gpio.c @@ -31,14 +31,19 @@ static inline void gpio_write32(gpio_t gpio_num, uint32_t value) write32(gpio_ctrl_ptr(gpio_num), value); } -static inline uint8_t iomux_read8(uint8_t reg) +static inline void *gpio_mux_ptr(gpio_t gpio_num) { - return read8(acpimmio_iomux + reg); + return acpimmio_iomux + gpio_num; } -static inline void iomux_write8(uint8_t reg, uint8_t value) +static inline uint8_t iomux_read8(gpio_t gpio_num) { - write8(acpimmio_iomux + reg, value); + return read8(gpio_mux_ptr(gpio_num)); +} + +static inline void iomux_write8(gpio_t gpio_num, uint8_t value) +{ + write8(gpio_mux_ptr(gpio_num), value); } static uint8_t get_gpio_mux(gpio_t gpio) -- cgit v1.2.3