From 36149888f6b26b3b268343b55251bf3aafc05296 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Fri, 14 Jul 2023 19:58:49 +0200 Subject: soc/amd/common/pm/pmlib: use PM register mapping in ACPIMMIO region In all SoC pm_set_power_failure_state gets called either after a call to enable_acpimmio_decode_pm04() or the ACPIMMIO mapping is already enabled after reset on the SoC. This allows to use pm_read8 and pm_write8 that use the ACPIMMIO mapping of the PM registers instead of pm_io_read8 and pm_io_write8 which won't work on Phoenix and Glinda due to the IO ports used on older generations to access to the PM registers not being implemented any more. Signed-off-by: Felix Held Change-Id: Id0d0523d2c4920da41b3fb73cf62f22a60f1643a Reviewed-on: https://review.coreboot.org/c/coreboot/+/76463 Tested-by: build bot (Jenkins) Reviewed-by: Martin L Roth --- src/soc/amd/common/block/pm/pmlib.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/soc/amd/common') diff --git a/src/soc/amd/common/block/pm/pmlib.c b/src/soc/amd/common/block/pm/pmlib.c index 5ce6b7bd0e..86cb2cf896 100644 --- a/src/soc/amd/common/block/pm/pmlib.c +++ b/src/soc/amd/common/block/pm/pmlib.c @@ -37,5 +37,5 @@ void pm_set_power_failure_state(void) break; } - pm_io_write8(PM_RTC_SHADOW_REG, pwr_fail); + pm_write8(PM_RTC_SHADOW_REG, pwr_fail); } -- cgit v1.2.3