From 02512eeb2ee5e0cea75dbd4f91501c998e93cc45 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Wed, 30 Mar 2022 21:44:39 +0200 Subject: soc/amd/common/block/i2c/i23c_pad_def.h: fix off by one in define I23C_PAD_CTRL_SLEW_N_SHIFT is 6 and not 7 which matches both with the PPR #57243 revision 1.53 and with I23C_PAD_CTRL_SLEW_N_MASK which covers both bits 6 and 7. Signed-off-by: Felix Held Change-Id: I622717bebaffe34b6df5e578b082dc10e2a98256 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63216 Reviewed-by: Karthik Ramasubramanian Reviewed-by: Raul Rangel Reviewed-by: Fred Reitberger Tested-by: build bot (Jenkins) --- src/soc/amd/common/block/i2c/i23c_pad_def.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/soc/amd/common') diff --git a/src/soc/amd/common/block/i2c/i23c_pad_def.h b/src/soc/amd/common/block/i2c/i23c_pad_def.h index 8973a0c633..ae7f3d6890 100644 --- a/src/soc/amd/common/block/i2c/i23c_pad_def.h +++ b/src/soc/amd/common/block/i2c/i23c_pad_def.h @@ -17,7 +17,7 @@ #define I23C_PAD_CTRL_RX_SEL_OFF (0 << I23C_PAD_CTRL_RX_SHIFT) #define I23C_PAD_CTRL_RX_SEL_ON (3 << I23C_PAD_CTRL_RX_SHIFT) #define I23C_PAD_CTRL_SLEW_N_MASK (BIT(6) | BIT(7)) -#define I23C_PAD_CTRL_SLEW_N_SHIFT 7 +#define I23C_PAD_CTRL_SLEW_N_SHIFT 6 #define I23C_PAD_CTRL_SLEW_N_DIS (0 << I23C_PAD_CTRL_SLEW_N_SHIFT) #define I23C_PAD_CTRL_SLEW_N_FAST (3 << I23C_PAD_CTRL_SLEW_N_SHIFT) #define I23C_PAD_CTRL_FALLSLEW_SEL_MASK (BIT(8) | BIT(9)) -- cgit v1.2.3