From d8bbc6c8e4dd46f0255099c90a8e71e60ac52590 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Fri, 14 Jul 2023 19:05:36 +0200 Subject: soc/amd/common/root_complex: add function to report non-PCI resources Introduce the common read_non_pci_resources function to read the base address of the non-PCI resources within the MMIO regions configured in the data fabric registers and pass that info to the resource allocator. Each SoC will need to provide implementations for get_iohc_misc_smn_base and get_iohc_non_pci_mmio_regs in order for read_non_pci_resources to know the SoC-specific base addresses, register offsets and MMIO region sizes. In case of SoCs with only one PCI root domain, the domain parameter of get_iohc_misc_smn_base will be unused, but in the case of SoCs with more than one PCI root domains, this parameter will be used by the SoC-specific code. Signed-off-by: Felix Held Change-Id: If9aca67fa0f5a0d504371367aaae5908bcb17dd9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/76553 Tested-by: build bot (Jenkins) Reviewed-by: Matt DeVillier Reviewed-by: Eric Lai Reviewed-by: Arthur Heymans --- .../common/block/include/amdblocks/root_complex.h | 23 +++++++++++++++++ src/soc/amd/common/block/root_complex/Kconfig | 6 +++++ src/soc/amd/common/block/root_complex/Makefile.inc | 2 ++ .../common/block/root_complex/non_pci_resources.c | 29 ++++++++++++++++++++++ 4 files changed, 60 insertions(+) create mode 100644 src/soc/amd/common/block/include/amdblocks/root_complex.h create mode 100644 src/soc/amd/common/block/root_complex/Kconfig create mode 100644 src/soc/amd/common/block/root_complex/Makefile.inc create mode 100644 src/soc/amd/common/block/root_complex/non_pci_resources.c (limited to 'src/soc/amd/common/block') diff --git a/src/soc/amd/common/block/include/amdblocks/root_complex.h b/src/soc/amd/common/block/include/amdblocks/root_complex.h new file mode 100644 index 0000000000..d9575c1bd4 --- /dev/null +++ b/src/soc/amd/common/block/include/amdblocks/root_complex.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef AMD_BLOCK_ROOT_COMPLEX_H +#define AMD_BLOCK_ROOT_COMPLEX_H + +#include +#include + +#define NON_PCI_RES_IDX_AUTO 0 + +struct non_pci_mmio_reg { + uint32_t iohc_misc_offset; + uint64_t mask; + uint64_t size; + unsigned long res_idx; /* Use NON_PCI_RES_IDX_AUTO or a specific resource index */ +}; + +void read_non_pci_resources(struct device *domain, unsigned int *idx); + +uint32_t get_iohc_misc_smn_base(struct device *domain); +const struct non_pci_mmio_reg *get_iohc_non_pci_mmio_regs(size_t *count); + +#endif /* AMD_BLOCK_ROOT_COMPLEX_H */ diff --git a/src/soc/amd/common/block/root_complex/Kconfig b/src/soc/amd/common/block/root_complex/Kconfig new file mode 100644 index 0000000000..829f308987 --- /dev/null +++ b/src/soc/amd/common/block/root_complex/Kconfig @@ -0,0 +1,6 @@ +config SOC_AMD_COMMON_BLOCK_ROOT_COMPLEX + bool + select SOC_AMD_COMMON_BLOCK_SMN + help + Select this option to add AMD common root complex support code + to the build. diff --git a/src/soc/amd/common/block/root_complex/Makefile.inc b/src/soc/amd/common/block/root_complex/Makefile.inc new file mode 100644 index 0000000000..ba550bda6b --- /dev/null +++ b/src/soc/amd/common/block/root_complex/Makefile.inc @@ -0,0 +1,2 @@ +## SPDX-License-Identifier: GPL-2.0-only +ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_ROOT_COMPLEX) += non_pci_resources.c diff --git a/src/soc/amd/common/block/root_complex/non_pci_resources.c b/src/soc/amd/common/block/root_complex/non_pci_resources.c new file mode 100644 index 0000000000..31f4eb0565 --- /dev/null +++ b/src/soc/amd/common/block/root_complex/non_pci_resources.c @@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include + +#define IOHC_MMIO_EN BIT(0) + +void read_non_pci_resources(struct device *domain, unsigned int *idx) +{ + const uint32_t iohc_misc_base = get_iohc_misc_smn_base(domain); + const struct non_pci_mmio_reg *regs; + size_t reg_count; + + regs = get_iohc_non_pci_mmio_regs(®_count); + + for (size_t i = 0; i < reg_count; i++) { + const uint64_t reg64 = smn_read64(iohc_misc_base + regs[i].iohc_misc_offset); + /* only report enabled non-PCI MMIO regions */ + if (!(reg64 & IOHC_MMIO_EN)) + continue; + + const unsigned long res_idx = regs[i].res_idx == NON_PCI_RES_IDX_AUTO ? + (*idx)++ : regs[i].res_idx; + const uint64_t base = reg64 & regs[i].mask; + mmio_range(domain, res_idx, base, regs[i].size); + } +} -- cgit v1.2.3