From 4de1a31cb04f0363b6d257d9de392cdfe8d5644c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Fri, 15 Jan 2021 05:58:42 +0200 Subject: ACPI: Add acpi_reset_gnvs_for_wake() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit With chipset_power_state filled in romstage CBMEM hooks and GNVS allocated early in ramstage, GNVS wake source is now also filled for normal boot path. Change-Id: I2d44770392d14d2d6e22cc98df9d1751c8717ff3 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/50004 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/soc/amd/common/block/acpi/pm_state.c | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) (limited to 'src/soc/amd/common/block') diff --git a/src/soc/amd/common/block/acpi/pm_state.c b/src/soc/amd/common/block/acpi/pm_state.c index 643cb0267b..787b732353 100644 --- a/src/soc/amd/common/block/acpi/pm_state.c +++ b/src/soc/amd/common/block/acpi/pm_state.c @@ -35,29 +35,25 @@ static void pm_fill_gnvs(struct global_nvs *gnvs, const struct acpi_pm_gpe_state int index; index = get_index_bit(state->pm1_sts & state->pm1_en, PM1_LIMIT); - if (index < 0) - gnvs->pm1i = ~0ULL; - else + if (index >= 0) gnvs->pm1i = index; index = get_index_bit(state->gpe0_sts & state->gpe0_en, GPE0_LIMIT); - if (index < 0) - gnvs->gpei = ~0ULL; - else + if (index >= 0) gnvs->gpei = index; } static void acpi_save_wake_source(void *unused) { const struct chipset_power_state *ps; - struct global_nvs *gnvs = acpi_get_gnvs(); - if (!gnvs) - return; + struct global_nvs *gnvs; + if (acpi_reset_gnvs_for_wake(&gnvs) < 0) + return; if (acpi_pm_state_for_wake(&ps) < 0) return; pm_fill_gnvs(gnvs, &ps->gpe_state); } -BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, acpi_save_wake_source, NULL); +BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, acpi_save_wake_source, NULL); -- cgit v1.2.3