From 3727708aefb03ac7ca0f15246cfded18b85b49b3 Mon Sep 17 00:00:00 2001 From: Marshall Dawson Date: Fri, 27 Oct 2017 20:12:46 -0600 Subject: soc/amd/common/psp: Require PSP PCI definition in SOC Remove the definition for the PSP PCI device from the common PSP code. Any APU using this source should have its own definitions, and this allows for the device to move within the config space. Change-Id: Ie41dfa348b04f655640b4259b1aa518376655251 Signed-off-by: Marshall Dawson Reviewed-on: https://review.coreboot.org/22249 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones Reviewed-by: Aaron Durbin --- src/soc/amd/common/block/psp/psp.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/soc/amd/common/block/psp') diff --git a/src/soc/amd/common/block/psp/psp.c b/src/soc/amd/common/block/psp/psp.c index 788de2ceea..8b3605e6fa 100644 --- a/src/soc/amd/common/block/psp/psp.c +++ b/src/soc/amd/common/block/psp/psp.c @@ -127,8 +127,8 @@ static int send_psp_command(u32 command, void *buffer) if (!mbox) return -PSPSTS_NOBASE; - command_reg = pci_read_config32(PSP_DEV, PCI_COMMAND); - pci_write_config32(PSP_DEV, PCI_COMMAND, command_reg | + command_reg = pci_read_config32(SOC_PSP_DEV, PCI_COMMAND); + pci_write_config32(SOC_PSP_DEV, PCI_COMMAND, command_reg | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); /* check for PSP error conditions */ @@ -168,7 +168,7 @@ static int send_psp_command(u32 command, void *buffer) } exit: /* restore command register to original value */ - pci_write_config32(PSP_DEV, PCI_COMMAND, command_reg); + pci_write_config32(SOC_PSP_DEV, PCI_COMMAND, command_reg); return status; } -- cgit v1.2.3