From 2e4b95da88a5f72269956e34ecaa183cdca48f79 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Wed, 4 May 2022 17:34:16 +0200 Subject: soc/amd/common/include/espi: generalize IO/MMIO decode range macros Sabrina has more eSPI decode ranges than Picasso or Cezanne. Those registers are however not in one block where it's easy to calculate the addresses of a register from the index of the decode range. Within one group of decode range registers it's still easy to calculate the register address, so move the base address from within the macro to the instantiation of the macro as a preparation for adding the support for the additional ranges. TEST=Timeless build results in identical binary for Mandolin Signed-off-by: Felix Held Change-Id: Id309d955fa3558d660db37a2075240f938361e83 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64052 Tested-by: build bot (Jenkins) Reviewed-by: Raul Rangel Reviewed-by: Fred Reitberger --- src/soc/amd/common/block/include/amdblocks/espi.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/soc/amd/common/block/include') diff --git a/src/soc/amd/common/block/include/amdblocks/espi.h b/src/soc/amd/common/block/include/amdblocks/espi.h index cfba50bd2d..45a220ef7c 100644 --- a/src/soc/amd/common/block/include/amdblocks/espi.h +++ b/src/soc/amd/common/block/include/amdblocks/espi.h @@ -25,10 +25,10 @@ #define ESPI_MMIO_SIZE_REG0 0x60 #define ESPI_MMIO_SIZE_REG1 0x64 -#define ESPI_IO_RANGE_BASE(range) (ESPI_IO_BASE_REG0 + ((range) & 3) * 2) -#define ESPI_IO_RANGE_SIZE(range) (ESPI_IO_SIZE0 + ((range) & 3)) -#define ESPI_MMIO_RANGE_BASE(range) (ESPI_MMIO_BASE_REG0 + ((range) & 3) * 4) -#define ESPI_MMIO_RANGE_SIZE(range) (ESPI_MMIO_SIZE_REG0 + ((range) & 3) * 2) +#define ESPI_IO_RANGE_BASE_REG(base, range) ((base) + ((range) & 3) * 2) +#define ESPI_IO_RANGE_SIZE_REG(base, range) ((base) + ((range) & 3)) +#define ESPI_MMIO_RANGE_BASE_REG(base, range) ((base) + ((range) & 3) * 4) +#define ESPI_MMIO_RANGE_SIZE_REG(base, range) ((base) + ((range) & 3) * 2) #define ESPI_GENERIC_IO_WIN_COUNT 4 #define ESPI_GENERIC_IO_MAX_WIN_SIZE 0x100 -- cgit v1.2.3