From 52742b6dbd22203a919fb7555953e2839e6e776f Mon Sep 17 00:00:00 2001 From: Felix Held Date: Sat, 25 Mar 2023 02:50:43 +0100 Subject: soc/amd/common/acpi/cpu_power_state: introduce and use get_pstate_0_reg On the Zen-based CPUs, P state 0 corresponds to the first P state MSR, but on Stoneyridge this isn't the case. Introduce get_pstate_0_reg that returns 0 for all non-CAR AMD CPUs. Signed-off-by: Felix Held Change-Id: Icc11e5b6099d37edb934e66fe329d8013d25f68d Reviewed-on: https://review.coreboot.org/c/coreboot/+/74021 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/soc/amd/common/block/include/amdblocks/cpu.h | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/amd/common/block/include/amdblocks') diff --git a/src/soc/amd/common/block/include/amdblocks/cpu.h b/src/soc/amd/common/block/include/amdblocks/cpu.h index 18b300dfdd..a6602336f5 100644 --- a/src/soc/amd/common/block/include/amdblocks/cpu.h +++ b/src/soc/amd/common/block/include/amdblocks/cpu.h @@ -17,6 +17,7 @@ void write_resume_eip(void); union pstate_msr; /* proper definition is in soc/msr.h */ uint32_t get_uvolts_from_vid(uint16_t core_vid); +uint32_t get_pstate_0_reg(void); uint32_t get_pstate_core_freq(union pstate_msr pstate_reg); uint32_t get_pstate_core_uvolts(union pstate_msr pstate_reg); const acpi_cstate_t *get_cstate_config_data(size_t *size); -- cgit v1.2.3