From f3dc71e0310859ebec687a6d67d1fa8140fad754 Mon Sep 17 00:00:00 2001 From: Marshall Dawson Date: Wed, 14 Jun 2017 16:22:07 -0600 Subject: soc/amd/common: Fix most checkpatch errors Correct the majority of reported errors and mark most of the remaining ones as todo. Some of the lines requiring a >80 break are indented too much currently. Changes to agesawrapper.c cause the build to change, so this file is also left as-is. Make hex values consistently lower-case. BUG=chrome-os-partner:622407746 Change-Id: I0464f0cafac4ee67edc95d377dcf7aab9a90c66b Signed-off-by: Marshall Dawson Reviewed-on: https://review.coreboot.org/20249 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/soc/amd/common/amd_pci_util.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/soc/amd/common/amd_pci_util.h') diff --git a/src/soc/amd/common/amd_pci_util.h b/src/soc/amd/common/amd_pci_util.h index fd5f077af3..4789542e58 100644 --- a/src/soc/amd/common/amd_pci_util.h +++ b/src/soc/amd/common/amd_pci_util.h @@ -28,14 +28,14 @@ struct pirq_struct { u8 PIN[4]; /* PINA/B/C/D are index 0/1/2/3 */ }; -extern const struct pirq_struct * pirq_data_ptr; +extern const struct pirq_struct *pirq_data_ptr; extern u32 pirq_data_size; -extern const u8 * intr_data_ptr; -extern const u8 * picr_data_ptr; +extern const u8 *intr_data_ptr; +extern const u8 *picr_data_ptr; u8 read_pci_int_idx(u8 index, int mode); void write_pci_int_idx(u8 index, int mode, u8 data); void write_pci_cfg_irqs(void); -void write_pci_int_table (void); +void write_pci_int_table(void); #endif /* AMD_PCI_UTIL_H */ -- cgit v1.2.3