From b9dd2561f81f2fcefcf756a68c14cdf5cbad2317 Mon Sep 17 00:00:00 2001 From: Fred Reitberger Date: Tue, 11 Oct 2022 09:54:30 -0400 Subject: soc/amd/*/psp_verstage/svc: Make svc.h macros common The psp_verstage/svc.h SVC_CALLx macros are virtually identical between picasso/cezanne/mendocino, so move to common. TEST=timeless builds are identical Signed-off-by: Fred Reitberger Change-Id: I86a8d9b043f68c01ee487f2cdbf7f61934b4a520 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68277 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- src/soc/amd/cezanne/psp_verstage/svc.c | 3 +- src/soc/amd/cezanne/psp_verstage/svc.h | 57 ---------------------------------- 2 files changed, 1 insertion(+), 59 deletions(-) delete mode 100644 src/soc/amd/cezanne/psp_verstage/svc.h (limited to 'src/soc/amd/cezanne') diff --git a/src/soc/amd/cezanne/psp_verstage/svc.c b/src/soc/amd/cezanne/psp_verstage/svc.c index 12fccc38f7..17f9d5135a 100644 --- a/src/soc/amd/cezanne/psp_verstage/svc.c +++ b/src/soc/amd/cezanne/psp_verstage/svc.c @@ -1,11 +1,10 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include "svc.h" - #include #include #include #include +#include void svc_exit(uint32_t status) { diff --git a/src/soc/amd/cezanne/psp_verstage/svc.h b/src/soc/amd/cezanne/psp_verstage/svc.h deleted file mode 100644 index e44948e04b..0000000000 --- a/src/soc/amd/cezanne/psp_verstage/svc.h +++ /dev/null @@ -1,57 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef PSP_VERSTAGE_SVC_H -#define PSP_VERSTAGE_SVC_H - -#define SVC_CALL4(SVC_ID, R0, R1, R2, R3, Ret) \ - __asm__ __volatile__ ( \ - "mov r0, %[reg0]\n\t" \ - "mov r1, %[reg1]\n\t" \ - "mov r2, %[reg2]\n\t" \ - "mov r3, %[reg3]\n\t" \ - "svc %[id]\n\t" \ - "mov %[result], r0\n\t" \ - : [result] "=r" (Ret) /* output */ \ - : [id] "i" (SVC_ID), [reg0] "r" (R0), [reg1] "r" (R1), [reg2] "r" (R2), \ - [reg3] "r" (R3) /* input(s) */ \ - : "r0", "r1", "r2", "r3", "memory", "cc" /* list of clobbered registers */) - -#define SVC_CALL3(SVC_ID, R0, R1, R2, Ret) \ - __asm__ __volatile__ ( \ - "mov r0, %[reg0]\n\t" \ - "mov r1, %[reg1]\n\t" \ - "mov r2, %[reg2]\n\t" \ - "svc %[id]\n\t" \ - "mov %[result], r0\n\t" \ - : [result] "=r" (Ret) /* output */ \ - : [id] "i" (SVC_ID), [reg0] "r" (R0), [reg1] "r" (R1), [reg2] "r" (R2) \ - : "r0", "r1", "r2", "memory", "cc" /* list of clobbered registers */) - -#define SVC_CALL2(SVC_ID, R0, R1, Ret) \ - __asm__ __volatile__ ( \ - "mov r0, %[reg0]\n\t" \ - "mov r1, %[reg1]\n\t" \ - "svc %[id]\n\t" \ - "mov %[result], r0\n\t" \ - : [result] "=r" (Ret) /* output */ \ - : [id] "i" (SVC_ID), [reg0] "r" (R0), [reg1] "r" (R1)/* input(s) */ \ - : "r0", "r1", "memory", "cc" /* list of clobbered registers */) - -#define SVC_CALL1(SVC_ID, R0, Ret) \ - __asm__ __volatile__ ( \ - "mov r0, %[reg0]\n\t" \ - "svc %[id]\n\t" \ - "mov %[result], r0\n\t" \ - : [result] "=r" (Ret) /* output */ \ - : [id] "i" (SVC_ID), [reg0] "r" (R0) /* input(s) */ \ - : "r0", "memory", "cc" /* list of clobbered registers */) - -#define SVC_CALL0(SVC_ID, Ret) \ - __asm__ __volatile__ ( \ - "svc %[id]\n\t" \ - "mov %[result], r0\n\t" \ - : [result] "=r" (Ret) /* output */ \ - : [id] "I" (SVC_ID) /* input(s) */ \ - : "memory", "cc" /* list of clobbered registers */) - -#endif /* PSP_VERSTAGE_SVC_H */ -- cgit v1.2.3