From 45a33b07712e8c65d1c6c257d53995fdb794a134 Mon Sep 17 00:00:00 2001
From: Mathew King <mathewk@chromium.org>
Date: Thu, 4 Mar 2021 15:32:50 -0700
Subject: soc/amd/cezanne: Include gpio.c in smm

Mainboards can configure gpios in their smihandler.

BUG=b:180507707
TEST=builds

Signed-off-by: Mathew King <mathewk@chromium.org>
Change-Id: I6c2b28f981f580cfb6f982a2d7e4c309d6f82e0b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51263
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
---
 src/soc/amd/cezanne/Makefile.inc | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/soc/amd/cezanne')

diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc
index 16b69f36d2..4c67b2bb7c 100644
--- a/src/soc/amd/cezanne/Makefile.inc
+++ b/src/soc/amd/cezanne/Makefile.inc
@@ -36,6 +36,7 @@ ramstage-y	+= reset.c
 ramstage-y	+= root_complex.c
 ramstage-y	+= uart.c
 
+smm-y		+= gpio.c
 smm-y		+= smihandler.c
 smm-y		+= smu.c
 smm-$(CONFIG_DEBUG_SMI) += uart.c
-- 
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