From 416cc665929e4e66bcab3e395daa031401a61fe8 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Wed, 31 Jan 2024 12:17:58 +0100 Subject: soc/amd: commonize PCI root IOAPIC initialization Make the initialization of the IOAPIC(s) in the PCI root(s) common across all AMD family 17h+ SoCs. For this the more general implementation from the Genoa code that supports multiple PC roots is moved to the common AMD code. All other family 17h+ SoCs are then adapted to use the common code. For those non-Genoa SoCs, the initialization of this second IOAPIC is moved from the northbridge device to the domain device above to match Genoa. Test=Both the FCH IOAPIC and the PCIe root IOAPIC are still initialized on Mandolin Signed-off-by: Felix Held Change-Id: I7c0ec6ac2f11cb11e46248cceec96c1fd2a49c16 Reviewed-on: https://review.coreboot.org/c/coreboot/+/80286 Reviewed-by: Matt DeVillier Tested-by: build bot (Jenkins) --- src/soc/amd/cezanne/chip.c | 2 ++ src/soc/amd/cezanne/root_complex.c | 6 ------ 2 files changed, 2 insertions(+), 6 deletions(-) (limited to 'src/soc/amd/cezanne') diff --git a/src/soc/amd/cezanne/chip.c b/src/soc/amd/cezanne/chip.c index ffbd94a404..7d315cbd3b 100644 --- a/src/soc/amd/cezanne/chip.c +++ b/src/soc/amd/cezanne/chip.c @@ -3,6 +3,7 @@ #include #include #include +#include #include #include #include @@ -29,6 +30,7 @@ struct device_operations cezanne_pci_domain_ops = { .read_resources = amd_pci_domain_read_resources, .set_resources = pci_domain_set_resources, .scan_bus = amd_pci_domain_scan_bus, + .init = amd_pci_domain_init, .acpi_name = soc_acpi_name, .acpi_fill_ssdt = amd_pci_domain_fill_ssdt, }; diff --git a/src/soc/amd/cezanne/root_complex.c b/src/soc/amd/cezanne/root_complex.c index 0fb086fc50..72a24199e2 100644 --- a/src/soc/amd/cezanne/root_complex.c +++ b/src/soc/amd/cezanne/root_complex.c @@ -42,11 +42,6 @@ struct dptc_input { }, \ } -static void root_complex_init(struct device *dev) -{ - register_new_ioapic((u8 *)GNB_IO_APIC_ADDR); -} - static void acipgen_dptci(void) { const struct soc_amd_cezanne_config *config = config_of_soc(); @@ -76,7 +71,6 @@ struct device_operations cezanne_root_complex_operations = { .read_resources = noop_read_resources, .set_resources = noop_set_resources, .enable_resources = pci_dev_enable_resources, - .init = root_complex_init, .acpi_name = gnb_acpi_name, .acpi_fill_ssdt = root_complex_fill_ssdt, }; -- cgit v1.2.3