From 5a7e4a59821905350c1cdfc3ddbf571c041d800e Mon Sep 17 00:00:00 2001 From: Felix Held Date: Fri, 5 Feb 2021 21:46:53 +0100 Subject: soc/amd/cezanne/chip: add PCI bus scanning Signed-off-by: Felix Held Change-Id: I76b0eb4470ac4a48e1caeaf507b5e6c45bb88119 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50333 Tested-by: build bot (Jenkins) Reviewed-by: Raul Rangel Reviewed-by: Angel Pons --- src/soc/amd/cezanne/chip.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'src/soc/amd/cezanne/chip.c') diff --git a/src/soc/amd/cezanne/chip.c b/src/soc/amd/cezanne/chip.c index 4a39024b1b..f6cac149f4 100644 --- a/src/soc/amd/cezanne/chip.c +++ b/src/soc/amd/cezanne/chip.c @@ -7,8 +7,22 @@ #include #include "chip.h" +static struct device_operations pci_domain_ops = { + .read_resources = pci_domain_read_resources, + .set_resources = pci_domain_set_resources, + .scan_bus = pci_domain_scan_bus, +}; + static void enable_dev(struct device *dev) { + /* Set the operations if it is a special bus type */ + switch (dev->path.type) { + case DEVICE_PATH_DOMAIN: + dev->ops = &pci_domain_ops; + break; + default: + break; + } } static void soc_init(void *chip_info) -- cgit v1.2.3