From 980721b3ed253e699c4a208040c76045abb3d964 Mon Sep 17 00:00:00 2001
From: Raul E Rangel <rrangel@chromium.org>
Date: Thu, 11 Feb 2021 16:43:53 -0700
Subject: soc/amd/cezanne/acpi: Add MMIO devices

The devices were copied from picasso with the following modifications:
* UART{2,3} were deleted
* I2C{0,1} were added
* eMMC was removed since it hasn't been validated

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Iddfb975e9292785d0951dd7bb31c1997d2185abd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50573
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
---
 src/soc/amd/cezanne/acpi/soc.asl | 4 ++++
 1 file changed, 4 insertions(+)

(limited to 'src/soc/amd/cezanne/acpi/soc.asl')

diff --git a/src/soc/amd/cezanne/acpi/soc.asl b/src/soc/amd/cezanne/acpi/soc.asl
index e472ec680a..618aa11297 100644
--- a/src/soc/amd/cezanne/acpi/soc.asl
+++ b/src/soc/amd/cezanne/acpi/soc.asl
@@ -5,4 +5,8 @@ Scope(\_SB) {
 	#include <arch/x86/acpi/globutil.asl>
 
 	#include <soc/amd/common/acpi/gpio_bank_lib.asl>
+
+	#include "pci_int_defs.asl"
+
+	#include "mmio.asl"
 } /* End \_SB scope */
-- 
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