From 88615629c051de0833e690463cef6967f0708c0c Mon Sep 17 00:00:00 2001
From: Felix Held <felix-coreboot@felixheld.de>
Date: Tue, 19 Jan 2021 23:51:45 +0100
Subject: soc/amd/cezanne: include LAPIC code and set MAX_CPUS to 16

Change-Id: I97c73324900a0677165afa3f5b182a336d534968
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49730
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
---
 src/soc/amd/cezanne/Makefile.inc | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/soc/amd/cezanne/Makefile.inc')

diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc
index 01dc97e819..9a4aa80ae1 100644
--- a/src/soc/amd/cezanne/Makefile.inc
+++ b/src/soc/amd/cezanne/Makefile.inc
@@ -2,6 +2,7 @@
 
 ifeq ($(CONFIG_SOC_AMD_CEZANNE),y)
 
+subdirs-y += ../../../cpu/x86/lapic
 subdirs-y += ../../../cpu/x86/mtrr
 
 # Beware that all-y also adds the compilation unit to verstage on PSP
-- 
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