From 2a1fc73fdf9fc3db3cdd7d30de3a268c83d339aa Mon Sep 17 00:00:00 2001 From: Fred Reitberger Date: Mon, 17 Jul 2023 09:09:42 -0400 Subject: soc/amd/*/Makefile.inc: Do not add APOB NV entry when disabled Do not add type 0x63 entry to amdfw.rom when APOB_NV cache is disabled. BUG=b:290763369 TEST=boot birman multiple times with/without APOB_NV cache enabled Signed-off-by: Fred Reitberger Change-Id: Iefe6f56d7dbedd289680f25a5f372eaa12e967b6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/76568 Reviewed-by: Karthik Ramasubramanian Reviewed-by: Martin L Roth Tested-by: build bot (Jenkins) --- src/soc/amd/cezanne/Makefile.inc | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/soc/amd/cezanne/Makefile.inc') diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc index f75bf06fa0..70170eff0f 100644 --- a/src/soc/amd/cezanne/Makefile.inc +++ b/src/soc/amd/cezanne/Makefile.inc @@ -127,10 +127,12 @@ PSP_ELF_FILE=$(objcbfs)/bootblock.elf PSP_BIOSBIN_SIZE=$(shell $(READELF_bootblock) -Wl $(PSP_ELF_FILE) | grep LOAD | awk '{print $$5}') PSP_BIOSBIN_DEST=$(shell $(READELF_bootblock) -Wl $(PSP_ELF_FILE) | grep LOAD | awk '{print $$3}') +ifneq ($(CONFIG_SOC_AMD_COMMON_BLOCK_APOB_NV_DISABLE),y) # type = 0x63 - construct APOB NV base/size from flash map # The flashmap section used for this is expected to be named RW_MRC_CACHE APOB_NV_SIZE=$(call get_fmap_value,FMAP_SECTION_RW_MRC_CACHE_SIZE) APOB_NV_BASE=$(call get_fmap_value,FMAP_SECTION_RW_MRC_CACHE_START) +endif # !CONFIG_SOC_AMD_COMMON_BLOCK_APOB_NV_DISABLE ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y) # type = 0x6B - PSP Shared memory location -- cgit v1.2.3