From 88615629c051de0833e690463cef6967f0708c0c Mon Sep 17 00:00:00 2001
From: Felix Held <felix-coreboot@felixheld.de>
Date: Tue, 19 Jan 2021 23:51:45 +0100
Subject: soc/amd/cezanne: include LAPIC code and set MAX_CPUS to 16

Change-Id: I97c73324900a0677165afa3f5b182a336d534968
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49730
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
---
 src/soc/amd/cezanne/Kconfig | 4 ++++
 1 file changed, 4 insertions(+)

(limited to 'src/soc/amd/cezanne/Kconfig')

diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig
index 1a38c77b67..83825cd387 100644
--- a/src/soc/amd/cezanne/Kconfig
+++ b/src/soc/amd/cezanne/Kconfig
@@ -108,6 +108,10 @@ config MMCONF_BUS_NUMBER
 	int
 	default 64
 
+config MAX_CPUS
+	int
+	default 16
+
 config CONSOLE_UART_BASE_ADDRESS
 	depends on CONSOLE_SERIAL && AMD_SOC_CONSOLE_UART
 	hex
-- 
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