From 02a5dddb01a6629aaf64fdc196b996883602a293 Mon Sep 17 00:00:00 2001
From: Zheng Bao <fishbaozi@gmail.com>
Date: Tue, 15 Dec 2020 22:16:51 +0800
Subject: soc/amd/cezanne: Add SMI support

Change-Id: I83b9a91cbab297d032292997a4d5768b89fe97dd
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48645
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/amd/cezanne/Kconfig | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/soc/amd/cezanne/Kconfig')

diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig
index be4d43294f..a51dc44db8 100644
--- a/src/soc/amd/cezanne/Kconfig
+++ b/src/soc/amd/cezanne/Kconfig
@@ -21,6 +21,7 @@ config SOC_SPECIFIC_OPTIONS
 	select SOC_AMD_COMMON_BLOCK_NONCAR
 	select SOC_AMD_COMMON_BLOCK_PCI_MMCONF
 	select SOC_AMD_COMMON_BLOCK_SMBUS
+	select SOC_AMD_COMMON_BLOCK_SMI
 	select SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H
 
 config EARLY_RESERVED_DRAM_BASE
-- 
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