From 6b8599f29a888c0946ff44e97c32ecd4cec2a151 Mon Sep 17 00:00:00 2001 From: Tim Wawrzynczak Date: Mon, 14 Feb 2022 16:04:21 -0700 Subject: drivers/tpm/spi: Refactor out some cr50-specific logic Mainboards accessing the cr50 over an I2C bus may want to reuse some of the same firmware version and BOARD_CFG logic, therefore refactor this logic out into a bus-agnostic file, drivers/tpm/cr50.c. This file uses the new tis_vendor_read/write() functions in order to access the cr50 regardless of the bus which is physically used. In order to leave SPI devices intact, the tis_vendor_* functions are added to the SPI driver. BUG=b:202246591 TEST=boot to OS on google/dratini, see the same FW version and board_cfg console prints as before the change. Signed-off-by: Tim Wawrzynczak Change-Id: Ie68618cbe026a2b9221f93d0fe41d0b2054e8091 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61977 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik --- src/security/tpm/tis.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/security/tpm') diff --git a/src/security/tpm/tis.h b/src/security/tpm/tis.h index 3b65134d27..0ef5a8a090 100644 --- a/src/security/tpm/tis.h +++ b/src/security/tpm/tis.h @@ -111,5 +111,9 @@ cb_err_t tis_vendor_write(unsigned int addr, const void *sendbuf, size_t send_si */ cb_err_t tis_vendor_read(unsigned int addr, void *recvbuf, size_t recv_size); +static inline bool tpm_first_access_this_boot(void) +{ + return ENV_SEPARATE_VERSTAGE || ENV_BOOTBLOCK || !CONFIG(VBOOT); +} #endif /* TIS_H_ */ -- cgit v1.2.3