From 31b7ee42016f7b54c24f30c271b4b93df16bfa10 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Mon, 17 Feb 2020 14:04:28 +0100 Subject: treewide: Replace uses of "Nehalem" The code in coreboot is actually for the Arrandale processors, which are a MCM (Multi-Chip Module) with two different dies: - Hillel: 32nm Westmere dual-core CPU - Ironlake: 45nm northbridge with integrated graphics This has nothing to do with the older, single-die Nehalem processors. Therefore, replace the references to Nehalem with the correct names. Change-Id: I8c10a2618c519d2411211b9b8f66d24f0018f908 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/38942 Reviewed-by: Felix Held Tested-by: build bot (Jenkins) --- src/security/tpm/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/security/tpm') diff --git a/src/security/tpm/Kconfig b/src/security/tpm/Kconfig index 95c0bb9b7d..fbe1735707 100644 --- a/src/security/tpm/Kconfig +++ b/src/security/tpm/Kconfig @@ -99,7 +99,7 @@ config TPM_STARTUP_IGNORE_POSTINIT Select this to ignore POSTINIT INVALID return codes on TPM startup. This is useful on platforms where a previous stage issued a TPM startup. Examples of use cases are Intel TXT - or VBOOT on the Intel Nehalem northbridge which issues a + or VBOOT on the Intel Arrandale processor, which issues a CPU-only reset during the romstage. endmenu # Trusted Platform Module (tpm) -- cgit v1.2.3