From e0f340054761086e4c329a2f66bb8f5b6e13d7c9 Mon Sep 17 00:00:00 2001 From: Keith Short Date: Tue, 5 Feb 2019 16:15:10 -0700 Subject: coreboot: check Cr50 PM mode on normal boot Under some scenarios the key ladder on the Cr50 can get disabled. If this state is detected, trigger a reboot of the Cr50 to restore full TPM functionality. BUG=b:121463033 BRANCH=none TEST=Built coreboot on sarien and grunt platforms. TEST=Ran 'gsctool -a -m disable' and reboot. Verified coreboot sends VENDOR_CC_IMMEDIATE_RESET command to Cr50 and that the Cr50 resets and then the platform boots normally. TEST=Performed Cr50 rollback to 0.0.22 which does not support the VENDOR_CC_TPM_MODE command, confirmed that platform boots normally and the coreboot log captures the unsupported command. Tested-by: Keith Short Change-Id: I70e012efaf1079d43890e909bc6b5015bef6835a Signed-off-by: Keith Short Reviewed-on: https://review.coreboot.org/c/31260 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner --- src/security/tpm/tss_errors.h | 1 + 1 file changed, 1 insertion(+) (limited to 'src/security/tpm/tss_errors.h') diff --git a/src/security/tpm/tss_errors.h b/src/security/tpm/tss_errors.h index 316661cd0a..ed6fc3d77c 100644 --- a/src/security/tpm/tss_errors.h +++ b/src/security/tpm/tss_errors.h @@ -42,5 +42,6 @@ #define TPM_E_NV_DEFINED ((uint32_t)0x0000500b) /* vboot local */ #define TPM_E_INVALID_ARG ((uint32_t)0x0000500c) #define TPM_E_HASH_ERROR ((uint32_t)0x0000500d) +#define TPM_E_NO_SUCH_COMMAND ((uint32_t)0x0000500e) #endif /* TSS_ERRORS_H_ */ -- cgit v1.2.3