From 704b59662d8bf17cac387109a186cc6f702f27f9 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Mon, 30 Aug 2010 17:53:13 +0000 Subject: We call this cache as ram everywhere, so let's call it the same in Kconfig Signed-off-by: Stefan Reinauer Acked-by: Myles Watson Acked-by: Peter Stuge git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5756 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/pc80/Makefile.inc | 2 +- src/pc80/serial.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'src/pc80') diff --git a/src/pc80/Makefile.inc b/src/pc80/Makefile.inc index b20f2b4161..b7890f56b6 100644 --- a/src/pc80/Makefile.inc +++ b/src/pc80/Makefile.inc @@ -4,7 +4,7 @@ obj-y += i8259.o obj-$(CONFIG_UDELAY_IO) += udelay_io.o obj-y += keyboard.o initobj-$(CONFIG_USE_OPTION_TABLE) += mc146818rtc_early.o -initobj-$(CONFIG_USE_DCACHE_RAM) += serial.o +initobj-$(CONFIG_CACHE_AS_RAM) += serial.o subdirs-y += vga $(obj)/pc80/mc146818rtc.o : $(OPTION_TABLE_H) diff --git a/src/pc80/serial.c b/src/pc80/serial.c index 449f0bada0..4a4ca68d2e 100644 --- a/src/pc80/serial.c +++ b/src/pc80/serial.c @@ -28,7 +28,7 @@ #define UART_LCS CONFIG_TTYS0_LCS -#if CONFIG_USE_DCACHE_RAM == 0 +#if CONFIG_CACHE_AS_RAM == 0 /* Data */ #define UART_RBR 0x00 @@ -97,7 +97,7 @@ void uart_init(void) } #else -/* CONFIG_USE_DCACHE_RAM == 1 */ +/* CONFIG_CACHE_AS_RAM == 1 */ extern void uart8250_init(unsigned base_port, unsigned divisor, unsigned lcs); void uart_init(void) -- cgit v1.2.3