From ec0ee64da7aa7e569da7d55ef86804d9b7fbea1b Mon Sep 17 00:00:00 2001 From: Myles Watson Date: Mon, 19 Oct 2009 16:21:30 +0000 Subject: Clean up some #ifdef CONFIG_* Change HAVE_FAN_CTL to be specific to the SuperIO that supports it. Signed-off-by: Myles Watson Acked-by: Uwe Hermann git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4809 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/northbridge/amd/amdk8/northbridge.c | 2 +- src/northbridge/intel/i82810/northbridge.c | 2 +- src/northbridge/intel/i82810/raminit.c | 2 +- src/northbridge/via/cx700/cx700_lpc.c | 4 ++-- 4 files changed, 5 insertions(+), 5 deletions(-) (limited to 'src/northbridge') diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index a252e08510..5113e3d255 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -357,7 +357,7 @@ static void amdk8_link_read_bases(device_t dev, unsigned nodeid, unsigned link) resource->gran = log2(HT_MEM_HOST_ALIGN); resource->limit = 0xffffffffffULL; resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; -#ifdef CONFIG_PCI_64BIT_PREF_MEM +#if CONFIG_PCI_64BIT_PREF_MEM resource->flags |= IORESOURCE_BRIDGE; #endif } diff --git a/src/northbridge/intel/i82810/northbridge.c b/src/northbridge/intel/i82810/northbridge.c index 16be66e75c..2129c1b6af 100644 --- a/src/northbridge/intel/i82810/northbridge.c +++ b/src/northbridge/intel/i82810/northbridge.c @@ -147,7 +147,7 @@ static void pci_domain_set_resources(device_t dev) /* Convert tomk from MB to KB. */ tomk = tomk << 10; -#ifdef CONFIG_VIDEO_MB +#if CONFIG_VIDEO_MB /* Check for VGA reserved memory. */ if (CONFIG_VIDEO_MB == 512) { tomk -= 512; diff --git a/src/northbridge/intel/i82810/raminit.c b/src/northbridge/intel/i82810/raminit.c index 61fb2b6396..570477fb81 100644 --- a/src/northbridge/intel/i82810/raminit.c +++ b/src/northbridge/intel/i82810/raminit.c @@ -371,7 +371,7 @@ static void sdram_set_registers(void) /* Set size for onboard-VGA framebuffer. */ reg8 = pci_read_config8(PCI_DEV(0, 0, 0), SMRAM); reg8 &= 0x3f; /* Disable graphics (for now). */ -#ifdef CONFIG_VIDEO_MB +#if CONFIG_VIDEO_MB if (CONFIG_VIDEO_MB == 512) reg8 |= (1 << 7); /* Enable graphics (512KB RAM). */ else if (CONFIG_VIDEO_MB == 1) diff --git a/src/northbridge/via/cx700/cx700_lpc.c b/src/northbridge/via/cx700/cx700_lpc.c index 217b174d65..90e453945e 100644 --- a/src/northbridge/via/cx700/cx700_lpc.c +++ b/src/northbridge/via/cx700/cx700_lpc.c @@ -37,7 +37,7 @@ #define HPET_ADDR 0xfe800000UL #define IOAPIC_ADDR 0xfec00000ULL -#ifdef CONFIG_IOAPIC +#if CONFIG_IOAPIC struct ioapicreg { unsigned int reg; unsigned int value_low, value_high; @@ -368,7 +368,7 @@ static void cx700_lpc_init(struct device *dev) { cx700_set_lpc_registers(dev); -#ifdef CONFIG_IOAPIC +#if CONFIG_IOAPIC setup_ioapic(); #endif -- cgit v1.2.3