From e183429bd2bbfa8e75480bfc4ec37b20afa04f2f Mon Sep 17 00:00:00 2001
From: Elyes HAOUAS <ehaouas@noos.fr>
Date: Mon, 4 Mar 2019 16:11:28 +0100
Subject: nb/intel/stage_cache.c: Drop unnecessary includes
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Change-Id: If6224c28012241e4925e05e14f0499857054f178
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31714
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
---
 src/northbridge/intel/gm45/stage_cache.c     | 4 +---
 src/northbridge/intel/i945/stage_cache.c     | 4 +---
 src/northbridge/intel/pineview/stage_cache.c | 4 +---
 src/northbridge/intel/x4x/stage_cache.c      | 4 +---
 4 files changed, 4 insertions(+), 12 deletions(-)

(limited to 'src/northbridge')

diff --git a/src/northbridge/intel/gm45/stage_cache.c b/src/northbridge/intel/gm45/stage_cache.c
index cbe4556bab..47f08c1397 100644
--- a/src/northbridge/intel/gm45/stage_cache.c
+++ b/src/northbridge/intel/gm45/stage_cache.c
@@ -13,11 +13,9 @@
  * GNU General Public License for more details.
  */
 
-#include <cbmem.h>
-#include <device/pci.h>
+#include <stdint.h>
 #include <stage_cache.h>
 #include <cpu/intel/smm/gen1/smi.h>
-#include "gm45.h"
 
 void stage_cache_external_region(void **base, size_t *size)
 {
diff --git a/src/northbridge/intel/i945/stage_cache.c b/src/northbridge/intel/i945/stage_cache.c
index b659796ea8..47f08c1397 100644
--- a/src/northbridge/intel/i945/stage_cache.c
+++ b/src/northbridge/intel/i945/stage_cache.c
@@ -13,11 +13,9 @@
  * GNU General Public License for more details.
  */
 
-#include <cbmem.h>
-#include <device/pci.h>
+#include <stdint.h>
 #include <stage_cache.h>
 #include <cpu/intel/smm/gen1/smi.h>
-#include "i945.h"
 
 void stage_cache_external_region(void **base, size_t *size)
 {
diff --git a/src/northbridge/intel/pineview/stage_cache.c b/src/northbridge/intel/pineview/stage_cache.c
index 6f949e69bd..47f08c1397 100644
--- a/src/northbridge/intel/pineview/stage_cache.c
+++ b/src/northbridge/intel/pineview/stage_cache.c
@@ -13,11 +13,9 @@
  * GNU General Public License for more details.
  */
 
-#include <cbmem.h>
-#include <device/pci.h>
+#include <stdint.h>
 #include <stage_cache.h>
 #include <cpu/intel/smm/gen1/smi.h>
-#include "pineview.h"
 
 void stage_cache_external_region(void **base, size_t *size)
 {
diff --git a/src/northbridge/intel/x4x/stage_cache.c b/src/northbridge/intel/x4x/stage_cache.c
index 8862c61db0..47f08c1397 100644
--- a/src/northbridge/intel/x4x/stage_cache.c
+++ b/src/northbridge/intel/x4x/stage_cache.c
@@ -13,11 +13,9 @@
  * GNU General Public License for more details.
  */
 
-#include <cbmem.h>
-#include <device/pci.h>
+#include <stdint.h>
 #include <stage_cache.h>
 #include <cpu/intel/smm/gen1/smi.h>
-#include "x4x.h"
 
 void stage_cache_external_region(void **base, size_t *size)
 {
-- 
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