From d2d2aef6a3222af909183fb96dc7bc908fac3cd4 Mon Sep 17 00:00:00 2001
From: Arthur Heymans <arthur@aheymans.xyz>
Date: Tue, 16 Jan 2018 14:19:37 +0100
Subject: sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location

Many generations of Intel hardware have identical code concerning the
RCBA.

Change-Id: I33ec6801b115c0d64de1d2a0dc5d439186f3580a
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/23287
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
---
 src/northbridge/intel/nehalem/early_init.c      | 1 +
 src/northbridge/intel/nehalem/nehalem.h         | 1 +
 src/northbridge/intel/nehalem/raminit.c         | 1 +
 src/northbridge/intel/sandybridge/early_init.c  | 1 +
 src/northbridge/intel/sandybridge/sandybridge.h | 1 +
 5 files changed, 5 insertions(+)

(limited to 'src/northbridge')

diff --git a/src/northbridge/intel/nehalem/early_init.c b/src/northbridge/intel/nehalem/early_init.c
index 3f55140883..319d81def1 100644
--- a/src/northbridge/intel/nehalem/early_init.c
+++ b/src/northbridge/intel/nehalem/early_init.c
@@ -25,6 +25,7 @@
 #include <cpu/intel/speedstep.h>
 #include <cpu/intel/turbo.h>
 #include <arch/cpu.h>
+#include <southbridge/intel/common/rcba.h>
 
 #include "nehalem.h"
 
diff --git a/src/northbridge/intel/nehalem/nehalem.h b/src/northbridge/intel/nehalem/nehalem.h
index 7a460fc054..33df32fa46 100644
--- a/src/northbridge/intel/nehalem/nehalem.h
+++ b/src/northbridge/intel/nehalem/nehalem.h
@@ -169,6 +169,7 @@ typedef struct {
 
 #define QUICKPATH_BUS 0xff
 
+#include <southbridge/intel/common/rcba.h>
 #include <southbridge/intel/ibexpeak/pch.h>
 
 /* Everything below this line is ignored in the DSDT */
diff --git a/src/northbridge/intel/nehalem/raminit.c b/src/northbridge/intel/nehalem/raminit.c
index b7b445ec86..a2ccbc36a8 100644
--- a/src/northbridge/intel/nehalem/raminit.c
+++ b/src/northbridge/intel/nehalem/raminit.c
@@ -55,6 +55,7 @@ typedef u32 device_t;
 
 #include "nehalem.h"
 
+#include <southbridge/intel/common/rcba.h>
 #include "southbridge/intel/ibexpeak/me.h"
 
 #if REAL
diff --git a/src/northbridge/intel/sandybridge/early_init.c b/src/northbridge/intel/sandybridge/early_init.c
index 2f1b790bcb..612e25b116 100644
--- a/src/northbridge/intel/sandybridge/early_init.c
+++ b/src/northbridge/intel/sandybridge/early_init.c
@@ -24,6 +24,7 @@
 #include <cbmem.h>
 #include <pc80/mc146818rtc.h>
 #include <romstage_handoff.h>
+#include <southbridge/intel/common/rcba.h>
 #include "sandybridge.h"
 
 static void sandybridge_setup_bars(void)
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h
index 8bbfae92a0..a3b4faad1d 100644
--- a/src/northbridge/intel/sandybridge/sandybridge.h
+++ b/src/northbridge/intel/sandybridge/sandybridge.h
@@ -58,6 +58,7 @@
 #define IOMMU_BASE2		0xfed91000ULL
 
 #include <southbridge/intel/bd82x6x/pch.h>
+#include <southbridge/intel/common/rcba.h>
 
 /* Everything below this line is ignored in the DSDT */
 #ifndef __ACPI__
-- 
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