From d0835953506263b0d9218b62176693315f2ef2f3 Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Tue, 5 Oct 2010 09:07:10 +0000 Subject: Remove lib/ramtest.c-include from all CAR boards. Remove many more .c-includes from i945 based boards. Signed-off-by: Patrick Georgi Acked-by: Uwe Hermann git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5910 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/northbridge/intel/i945/Makefile.inc | 6 ++++++ src/northbridge/intel/i945/debug.c | 17 ++++++++++++----- src/northbridge/intel/i945/early_init.c | 12 +++++++++--- src/northbridge/intel/i945/errata.c | 2 ++ src/northbridge/intel/i945/i945.h | 17 +++++++++++++++++ src/northbridge/intel/i945/raminit.c | 8 ++++++++ src/northbridge/intel/i945/raminit.h | 2 ++ src/northbridge/intel/i945/udelay.c | 1 + 8 files changed, 57 insertions(+), 8 deletions(-) (limited to 'src/northbridge') diff --git a/src/northbridge/intel/i945/Makefile.inc b/src/northbridge/intel/i945/Makefile.inc index 57362c6c47..1dd8d117ea 100644 --- a/src/northbridge/intel/i945/Makefile.inc +++ b/src/northbridge/intel/i945/Makefile.inc @@ -20,3 +20,9 @@ driver-y += northbridge.c driver-y += gma.c ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c + +romstage-y += udelay.c +romstage-y += raminit.c +romstage-y += early_init.c +romstage-y += errata.c +romstage-y += debug.c diff --git a/src/northbridge/intel/i945/debug.c b/src/northbridge/intel/i945/debug.c index dd095ca7b3..8dc76fe447 100644 --- a/src/northbridge/intel/i945/debug.c +++ b/src/northbridge/intel/i945/debug.c @@ -19,11 +19,18 @@ * MA 02110-1301 USA */ +#include +#include +#include +#include +#include +#include "i945.h" + #define SMBUS_MEM_DEVICE_START 0x50 #define SMBUS_MEM_DEVICE_END 0x53 #define SMBUS_MEM_DEVICE_INC 1 -static inline void print_pci_devices(void) +void print_pci_devices(void) { device_t dev; for(dev = PCI_DEV(0, 0, 0); @@ -42,7 +49,7 @@ static inline void print_pci_devices(void) } } -static inline void dump_pci_device(unsigned dev) +void dump_pci_device(unsigned dev) { int i; @@ -61,7 +68,7 @@ static inline void dump_pci_device(unsigned dev) } } -static inline void dump_pci_devices(void) +void dump_pci_devices(void) { device_t dev; for(dev = PCI_DEV(0, 0, 0); @@ -78,7 +85,7 @@ static inline void dump_pci_devices(void) } } -static inline void dump_spd_registers(void) +void dump_spd_registers(void) { unsigned device; device = SMBUS_MEM_DEVICE_START; @@ -103,7 +110,7 @@ static inline void dump_spd_registers(void) } } -static inline void dump_mem(unsigned start, unsigned end) +void dump_mem(unsigned start, unsigned end) { unsigned i; print_debug("dump_mem:"); diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c index c892216dea..e301f8a019 100644 --- a/src/northbridge/intel/i945/early_init.c +++ b/src/northbridge/intel/i945/early_init.c @@ -17,10 +17,16 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include +#include +#include +#include +#include +#include #include "i945.h" #include "pcie_config.c" -static int i945_silicon_revision(void) +int i945_silicon_revision(void) { return pci_read_config8(PCI_DEV(0, 0x00, 0), PCI_CLASS_REVISION); } @@ -856,7 +862,7 @@ static void ich7_setup_pci_express(void) pci_write_config32(PCI_DEV(0, 0x1c, 0), 0xd8, 0x00110000); } -static void i945_early_initialization(void) +void i945_early_initialization(void) { /* Print some chipset specific information */ switch (pci_read_config32(PCI_DEV(0, 0x00, 0), 0)) { @@ -879,7 +885,7 @@ static void i945_early_initialization(void) RCBA32(0x2010) |= (1 << 10); } -static void i945_late_initialization(void) +void i945_late_initialization(void) { i945_setup_egress_port(); diff --git a/src/northbridge/intel/i945/errata.c b/src/northbridge/intel/i945/errata.c index d6623c5e35..ad157dcb43 100644 --- a/src/northbridge/intel/i945/errata.c +++ b/src/northbridge/intel/i945/errata.c @@ -17,6 +17,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include +#include "i945.h" #include "raminit.h" int fixup_i945_errata(void) diff --git a/src/northbridge/intel/i945/i945.h b/src/northbridge/intel/i945/i945.h index 0d6f024673..477c4a559d 100644 --- a/src/northbridge/intel/i945/i945.h +++ b/src/northbridge/intel/i945/i945.h @@ -333,5 +333,22 @@ static inline void barrier(void) { asm("" ::: "memory"); } +int i945_silicon_revision(void); +void i945_early_initialization(void); +void i945_late_initialization(void); + +/* provided by southbridge code */ +int smbus_read_byte(unsigned device, unsigned address); + +/* provided by mainboard code */ +void setup_ich7_gpios(void); + +/* debugging functions */ +void print_pci_devices(void); +void dump_pci_device(unsigned dev); +void dump_pci_devices(void); +void dump_spd_registers(void); +void dump_mem(unsigned start, unsigned end); + #endif #endif diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c index 1595b8b3bc..c23fa64dbb 100644 --- a/src/northbridge/intel/i945/raminit.c +++ b/src/northbridge/intel/i945/raminit.c @@ -17,10 +17,13 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include #include #include #include #include +#include +#include #include "raminit.h" #include "i945.h" @@ -45,6 +48,11 @@ #define RAM_EMRS_2 (0x1 << 21) #define RAM_EMRS_3 (0x2 << 21) +static inline int spd_read_byte(unsigned device, unsigned address) +{ + return smbus_read_byte(device, address); +} + static __attribute__((noinline)) void do_ram_command(u32 command) { u32 reg32; diff --git a/src/northbridge/intel/i945/raminit.h b/src/northbridge/intel/i945/raminit.h index eecfe241fe..026d715047 100644 --- a/src/northbridge/intel/i945/raminit.h +++ b/src/northbridge/intel/i945/raminit.h @@ -71,4 +71,6 @@ void receive_enable_adjust(struct sys_info *sysinfo); void sdram_initialize(int boot_path); unsigned long get_top_of_ram(void); int fixup_i945_errata(void); +void udelay(u32 us); + #endif /* RAMINIT_H */ diff --git a/src/northbridge/intel/i945/udelay.c b/src/northbridge/intel/i945/udelay.c index d5349c937e..6b3882bc18 100644 --- a/src/northbridge/intel/i945/udelay.c +++ b/src/northbridge/intel/i945/udelay.c @@ -18,6 +18,7 @@ */ #include +#include #include #include -- cgit v1.2.3