From cf1cb5b2d4f528e7eab55ee9393cf72016bac888 Mon Sep 17 00:00:00 2001 From: Timothy Pearson Date: Mon, 9 Jan 2017 13:19:29 -0600 Subject: amd/mct/ddr3: Correctly configure CsMux45 The existing logic to set up CsMux45 used an incorrect mask and comparison value due to a copy + paste editing error. Use the correct mask and comparison value for the last two values. Found-by: Coverity Scan #1347385 Change-Id: Ic08a52977df90b9952e434e71cd12dbc6d7e1443 Signed-off-by: Timothy Pearson Reviewed-on: https://review.coreboot.org/18070 Reviewed-by: Martin Roth Tested-by: Raptor Engineering Automated Test Stand Reviewed-by: Paul Menzel --- src/northbridge/amd/amdmct/mct_ddr3/mctproc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/northbridge') diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c b/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c index 07bde27d37..48658f58e5 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c @@ -43,7 +43,7 @@ u32 mct_SetDramConfigMisc2(struct DCTStatStruc *pDCTstat, if ((((f2x80 & 0xf) == 0x7) || ((f2x80 & 0xf) == 0x9)) && ((f2x60 & 0x3) == 0x3)) cs_mux_45 = 1; - else if ((((f2x80 & 0xa) == 0x7) || ((f2x80 & 0xb) == 0x9)) + else if ((((f2x80 & 0xf) == 0xa) || ((f2x80 & 0xf) == 0xb)) && ((f2x60 & 0x3) > 0x1)) cs_mux_45 = 1; else -- cgit v1.2.3