From cbf957158806bcd5c733c45baa324559904c609c Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sun, 5 Jan 2020 08:05:45 +0200 Subject: drivers/pc80/rtc: Separate {get|set}_option() prototypes MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Long-term plan is to support loading runtime configuration from SPI flash as an alternative, so move these prototypes outside pc80/. Change-Id: Iad7b03dc985550da903d56b3deb5bd736013f8f1 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/38192 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/northbridge/intel/gm45/igd.c | 2 +- src/northbridge/intel/i945/early_init.c | 2 +- src/northbridge/intel/i945/gma.c | 2 +- src/northbridge/intel/nehalem/raminit.c | 2 +- src/northbridge/intel/pineview/early_init.c | 2 +- src/northbridge/intel/sandybridge/early_init.c | 2 +- src/northbridge/intel/x4x/early_init.c | 2 +- 7 files changed, 7 insertions(+), 7 deletions(-) (limited to 'src/northbridge') diff --git a/src/northbridge/intel/gm45/igd.c b/src/northbridge/intel/gm45/igd.c index b1ce1bef90..cfd067e044 100644 --- a/src/northbridge/intel/gm45/igd.c +++ b/src/northbridge/intel/gm45/igd.c @@ -19,7 +19,7 @@ #include #include #include -#include +#include #include "gm45.h" diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c index 6e650eb050..1deca3eeba 100644 --- a/src/northbridge/intel/i945/early_init.c +++ b/src/northbridge/intel/i945/early_init.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include #include "i945.h" diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c index d08b77d3e2..98e30e7d07 100644 --- a/src/northbridge/intel/i945/gma.c +++ b/src/northbridge/intel/i945/gma.c @@ -22,7 +22,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/src/northbridge/intel/nehalem/raminit.c b/src/northbridge/intel/nehalem/raminit.c index 215e9b82cb..7735522da9 100644 --- a/src/northbridge/intel/nehalem/raminit.c +++ b/src/northbridge/intel/nehalem/raminit.c @@ -24,7 +24,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/src/northbridge/intel/pineview/early_init.c b/src/northbridge/intel/pineview/early_init.c index b5c5ee0f63..c3cd380dc5 100644 --- a/src/northbridge/intel/pineview/early_init.c +++ b/src/northbridge/intel/pineview/early_init.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include #include #define LPC PCI_DEV(0, 0x1f, 0) diff --git a/src/northbridge/intel/sandybridge/early_init.c b/src/northbridge/intel/sandybridge/early_init.c index 95fc52d262..74ae4f5e08 100644 --- a/src/northbridge/intel/sandybridge/early_init.c +++ b/src/northbridge/intel/sandybridge/early_init.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include #include diff --git a/src/northbridge/intel/x4x/early_init.c b/src/northbridge/intel/x4x/early_init.c index c9d44fc8d5..3520b88deb 100644 --- a/src/northbridge/intel/x4x/early_init.c +++ b/src/northbridge/intel/x4x/early_init.c @@ -22,7 +22,7 @@ #else #include /* DEFAULT_PMBASE */ #endif -#include +#include #include "x4x.h" #include #include -- cgit v1.2.3