From c1ca6588bd1bdf85e69a9e61013135ec0750ee62 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Fri, 23 Aug 2024 11:19:20 +0200 Subject: nb/intel/sandybridge: Fix uninitialised variable GCC with LTO caught this. Change-Id: I9f78b9973729bdedb40bd63b8989e94c9c498814 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/84055 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/northbridge/intel/sandybridge/raminit.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/northbridge') diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index 8a8bd8310b..d5e1a7c09a 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -340,7 +340,7 @@ static void init_dram_ddr3(int s3resume, const u32 cpuid) int me_uma_size, cbmem_was_inited, fast_boot, err; ramctr_timing ctrl; spd_ddr3_raw_data spds[4]; - size_t mrc_size; + size_t mrc_size = 0; ramctr_timing *ctrl_cached = NULL; timestamp_add_now(TS_INITRAM_START); -- cgit v1.2.3