From bf0970e762a6611cef06af761bc2dec068d439bb Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Thu, 21 Mar 2019 11:10:03 +0100 Subject: src: Use include when appropriate Change-Id: I23bc0191ca8fcd88364e5c08be7c90195019e399 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/coreboot/+/32012 Tested-by: build bot (Jenkins) Reviewed-by: Werner Zeh Reviewed-by: David Guckian --- src/northbridge/amd/amdmct/wrappers/mcti_d.c | 2 +- src/northbridge/intel/fsp_rangeley/northbridge.c | 1 - src/northbridge/intel/gm45/gma.c | 7 +++---- src/northbridge/intel/haswell/minihd.c | 1 - src/northbridge/intel/sandybridge/raminit.c | 2 +- src/northbridge/intel/x4x/gma.c | 9 ++++----- src/northbridge/intel/x4x/raminit.c | 6 +++--- 7 files changed, 12 insertions(+), 16 deletions(-) (limited to 'src/northbridge') diff --git a/src/northbridge/amd/amdmct/wrappers/mcti_d.c b/src/northbridge/amd/amdmct/wrappers/mcti_d.c index e42085dce5..7aaf016d29 100644 --- a/src/northbridge/amd/amdmct/wrappers/mcti_d.c +++ b/src/northbridge/amd/amdmct/wrappers/mcti_d.c @@ -17,9 +17,9 @@ /* Call-backs */ #include -#include #include #include + #include "mcti.h" #define NVRAM_DDR2_800 0 diff --git a/src/northbridge/intel/fsp_rangeley/northbridge.c b/src/northbridge/intel/fsp_rangeley/northbridge.c index edc623a33b..63f2068725 100644 --- a/src/northbridge/intel/fsp_rangeley/northbridge.c +++ b/src/northbridge/intel/fsp_rangeley/northbridge.c @@ -19,7 +19,6 @@ #include #include #include -#include #include #include #include diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c index 6e54208563..3549b49234 100644 --- a/src/northbridge/intel/gm45/gma.c +++ b/src/northbridge/intel/gm45/gma.c @@ -16,10 +16,12 @@ #include #include -#include #include #include #include +#include +#include +#include #include #include #include @@ -29,9 +31,6 @@ #include "drivers/intel/gma/i915_reg.h" #include "chip.h" #include "gm45.h" -#include -#include -#include static struct resource *gtt_res = NULL; diff --git a/src/northbridge/intel/haswell/minihd.c b/src/northbridge/intel/haswell/minihd.c index 994296adb0..61265dd281 100644 --- a/src/northbridge/intel/haswell/minihd.c +++ b/src/northbridge/intel/haswell/minihd.c @@ -21,7 +21,6 @@ #include #include #include -#include #include #include diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index 4a048db7c7..c066634312 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -30,7 +30,7 @@ #include #include #include -#include + #include "raminit_native.h" #include "raminit_common.h" #include "sandybridge.h" diff --git a/src/northbridge/intel/x4x/gma.c b/src/northbridge/intel/x4x/gma.c index c36a10352e..c4e8bf1cdd 100644 --- a/src/northbridge/intel/x4x/gma.c +++ b/src/northbridge/intel/x4x/gma.c @@ -16,17 +16,12 @@ */ #include -#include #include #include #include #include #include #include - -#include "drivers/intel/gma/i915_reg.h" -#include "chip.h" -#include "x4x.h" #include #include #include @@ -35,6 +30,10 @@ #include #include +#include "chip.h" +#include "drivers/intel/gma/i915_reg.h" +#include "x4x.h" + #if CONFIG(SOUTHBRIDGE_INTEL_I82801JX) #include #elif CONFIG(SOUTHBRIDGE_INTEL_I82801GX) diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c index 02a8b74f70..4943428d0e 100644 --- a/src/northbridge/intel/x4x/raminit.c +++ b/src/northbridge/intel/x4x/raminit.c @@ -21,15 +21,12 @@ #include #include #include -#include #include -#include "iomap.h" #if CONFIG(SOUTHBRIDGE_INTEL_I82801GX) #include /* smbus_read_byte */ #else #include /* smbus_read_byte */ #endif -#include "x4x.h" #include #include #include @@ -37,6 +34,9 @@ #include #include +#include "iomap.h" +#include "x4x.h" + #define MRC_CACHE_VERSION 0 static inline int spd_read_byte(unsigned int device, unsigned int address) -- cgit v1.2.3