From aaea66aca89ae396b0067f63bb11bba208af3da9 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Tue, 15 Sep 2020 00:41:14 +0200 Subject: nb/intel/ironlake: Use `MSAC` definition Tested with BUILD_TIMELESS=1, Packard Bell MS2290 remains identical. Change-Id: I479fd701f992701584d77d43c5cd5910f5ab7632 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/45383 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/northbridge/intel/ironlake/raminit.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/northbridge') diff --git a/src/northbridge/intel/ironlake/raminit.c b/src/northbridge/intel/ironlake/raminit.c index 0cefe4f888..68eefec9dd 100644 --- a/src/northbridge/intel/ironlake/raminit.c +++ b/src/northbridge/intel/ironlake/raminit.c @@ -3654,8 +3654,8 @@ void chipset_init(const int s3resume) MCHBAR16_OR(0x2c30, 0x200); MCHBAR16(0x2c32) = 0x434; MCHBAR32_AND_OR(0x2c44, 0, 0x1053687); - pci_read_config8(GMA, 0x62); // = 0x2 - pci_write_config8(GMA, 0x62, 0x2); + pci_read_config8(GMA, MSAC); // = 0x2 + pci_write_config8(GMA, MSAC, 0x2); read8(DEFAULT_RCBA + 0x2318); write8(DEFAULT_RCBA + 0x2318, 0x47); read8(DEFAULT_RCBA + 0x2320); -- cgit v1.2.3