From 932fbd659ac7bea41e977f5fb5315fcfc93d36dd Mon Sep 17 00:00:00 2001 From: Shawn Nematbakhsh Date: Wed, 8 May 2013 11:41:04 -0700 Subject: Add DDR refresh config to pei data structure. Allow platform customized DDR config, including forcing refresh rate to 2x. Change-Id: I311ae7ddf25142153c94a3fc3fb0a36e03f50ab2 Reviewed-on: https://gerrit.chromium.org/gerrit/50476 Reviewed-by: Duncan Laurie Tested-by: Shawn Nematbakhsh Commit-Queue: Shawn Nematbakhsh Reviewed-on: http://review.coreboot.org/4213 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich --- src/northbridge/intel/sandybridge/pei_data.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'src/northbridge') diff --git a/src/northbridge/intel/sandybridge/pei_data.h b/src/northbridge/intel/sandybridge/pei_data.h index d317515cf0..5e0ff0f56b 100644 --- a/src/northbridge/intel/sandybridge/pei_data.h +++ b/src/northbridge/intel/sandybridge/pei_data.h @@ -121,6 +121,14 @@ struct pei_data * 2 2N */ int nmode; + /* DDR refresh rate config. JEDEC Standard No.21-C Annex K allows + * for DIMM SPD data to specify whether double-rate is required for + * extended operating temperature range. + * 0 Enable double rate based upon temperature thresholds + * 1 Normal rate + * 2 Always enable double rate + */ + int ddr_refresh_rate_config; } __attribute__((packed)); #endif -- cgit v1.2.3