From 9265f89f4e892caa043f60272980e7cec81bce62 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sun, 7 Jul 2019 23:58:34 +0300 Subject: arch/x86: Avoid HAVE_SMI_HANDLER conditional with smm-class MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Build of the entire smm-class is skipped if we have HAVE_SMI_HANDLER=n. Change-Id: I10b4300ddd18b1673c404b45fd9642488ab3186c Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/34125 Reviewed-by: Nico Huber Reviewed-by: Furquan Shaikh Reviewed-by: Lance Zhao Tested-by: build bot (Jenkins) --- src/northbridge/intel/fsp_rangeley/Makefile.inc | 2 +- src/northbridge/intel/gm45/Makefile.inc | 2 +- src/northbridge/intel/haswell/Makefile.inc | 2 +- src/northbridge/intel/nehalem/Makefile.inc | 2 +- src/northbridge/intel/sandybridge/Makefile.inc | 4 ++-- 5 files changed, 6 insertions(+), 6 deletions(-) (limited to 'src/northbridge') diff --git a/src/northbridge/intel/fsp_rangeley/Makefile.inc b/src/northbridge/intel/fsp_rangeley/Makefile.inc index 410a308249..f9bf0507dc 100644 --- a/src/northbridge/intel/fsp_rangeley/Makefile.inc +++ b/src/northbridge/intel/fsp_rangeley/Makefile.inc @@ -27,7 +27,7 @@ romstage-y += raminit.c romstage-y += ../../../arch/x86/walkcbfs.S romstage-y += port_access.c -smm-$(CONFIG_HAVE_SMI_HANDLER) += udelay.c +smm-y += udelay.c CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR) diff --git a/src/northbridge/intel/gm45/Makefile.inc b/src/northbridge/intel/gm45/Makefile.inc index 16a9ddb648..e74f475987 100644 --- a/src/northbridge/intel/gm45/Makefile.inc +++ b/src/northbridge/intel/gm45/Makefile.inc @@ -35,7 +35,7 @@ ramstage-y += ram_calc.c ramstage-y += northbridge.c ramstage-y += gma.c -smm-$(CONFIG_HAVE_SMI_HANDLER) += ../../../cpu/x86/lapic/apic_timer.c +smm-y += ../../../cpu/x86/lapic/apic_timer.c postcar-y += ram_calc.c diff --git a/src/northbridge/intel/haswell/Makefile.inc b/src/northbridge/intel/haswell/Makefile.inc index 7abbccacd2..ca1c04fa13 100644 --- a/src/northbridge/intel/haswell/Makefile.inc +++ b/src/northbridge/intel/haswell/Makefile.inc @@ -29,7 +29,7 @@ romstage-y += raminit.c romstage-y += early_init.c romstage-y += report_platform.c -smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c +smm-y += finalize.c # We don't ship that, but booting without it is bound to fail cbfs-files-$(CONFIG_HAVE_MRC) += mrc.bin diff --git a/src/northbridge/intel/nehalem/Makefile.inc b/src/northbridge/intel/nehalem/Makefile.inc index 6722621ba1..c0d46c9a0c 100644 --- a/src/northbridge/intel/nehalem/Makefile.inc +++ b/src/northbridge/intel/nehalem/Makefile.inc @@ -27,7 +27,7 @@ romstage-y += raminit.c romstage-y += early_init.c romstage-y += ../../../arch/x86/walkcbfs.S -smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c +smm-y += finalize.c postcar-y += ram_calc.c diff --git a/src/northbridge/intel/sandybridge/Makefile.inc b/src/northbridge/intel/sandybridge/Makefile.inc index c77f3bac6a..8a0b67b2c9 100644 --- a/src/northbridge/intel/sandybridge/Makefile.inc +++ b/src/northbridge/intel/sandybridge/Makefile.inc @@ -26,7 +26,7 @@ romstage-y += ram_calc.c ramstage-y += common.c romstage-y += common.c -smm-$(CONFIG_HAVE_SMI_HANDLER) += common.c +smm-y += common.c ifeq ($(CONFIG_USE_NATIVE_RAMINIT),y) romstage-y += early_dmi.c @@ -46,7 +46,7 @@ romstage-y += romstage.c romstage-y += early_init.c romstage-y += ../../../arch/x86/walkcbfs.S -smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c +smm-y += finalize.c postcar-y += ram_calc.c -- cgit v1.2.3