From 825332d3c9eb4c32b9e2f8eb54bcc838b1c00bb3 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Sat, 21 Mar 2020 19:31:53 +0100 Subject: nb/intel/sandybridge: Factor out timing tables The timing tables for Sandy Bridge are a subset of Ivy Bridge's tables. Move the latter to a common place, and use it for both generations. Tested on Asus P8Z77-V LX2 with an i7-2600 and an i5-3330, both work. Change-Id: Id14227febf4eebb8a2b4d2d4f37759d0f42648c6 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/39735 Reviewed-by: Patrick Georgi Tested-by: build bot (Jenkins) --- src/northbridge/intel/sandybridge/raminit_ivy.c | 157 +++++---------------- src/northbridge/intel/sandybridge/raminit_sandy.c | 55 ++------ src/northbridge/intel/sandybridge/raminit_tables.c | 105 ++++++++++++++ src/northbridge/intel/sandybridge/raminit_tables.h | 20 +++ 4 files changed, 172 insertions(+), 165 deletions(-) (limited to 'src/northbridge') diff --git a/src/northbridge/intel/sandybridge/raminit_ivy.c b/src/northbridge/intel/sandybridge/raminit_ivy.c index 3dcdaba4f9..67927ed033 100644 --- a/src/northbridge/intel/sandybridge/raminit_ivy.c +++ b/src/northbridge/intel/sandybridge/raminit_ivy.c @@ -7,6 +7,7 @@ #include #include "raminit_native.h" #include "raminit_common.h" +#include "raminit_tables.h" /* Frequency multiplier */ static u32 get_FRQ(u32 tCK, u8 base_freq) @@ -31,175 +32,91 @@ static u32 get_FRQ(u32 tCK, u8 base_freq) /* Get REFI based on MC frequency, tREFI = 7.8usec */ static u32 get_REFI(u32 tCK, u8 base_freq) { - if (base_freq == 100) { - static const u32 frq_xs_map[] = { - /* FRQ: 7, 8, 9, 10, 11, 12, */ - 5460, 6240, 7020, 7800, 8580, 9360, - }; - return frq_xs_map[get_FRQ(tCK, 100) - 7]; + if (base_freq == 100) + return frq_refi_map[1][get_FRQ(tCK, 100) - 7]; - } else { - static const u32 frq_refi_map[] = { - /* FRQ: 3, 4, 5, 6, 7, 8, 9, 10, */ - 3120, 4160, 5200, 6240, 7280, 8320, 9360, 10400, - }; - return frq_refi_map[get_FRQ(tCK, 133) - 3]; - } + else + return frq_refi_map[0][get_FRQ(tCK, 133) - 3]; } /* Get XSOffset based on MC frequency, tXS-Offset: tXS = tRFC + 10ns */ static u8 get_XSOffset(u32 tCK, u8 base_freq) { - if (base_freq == 100) { - static const u8 frq_xs_map[] = { - /* FRQ: 7, 8, 9, 10, 11, 12, */ - 7, 8, 9, 10, 11, 12, - }; - return frq_xs_map[get_FRQ(tCK, 100) - 7]; + if (base_freq == 100) + return frq_xs_map[1][get_FRQ(tCK, 100) - 7]; - } else { - static const u8 frq_xs_map[] = { - /* FRQ: 3, 4, 5, 6, 7, 8, 9, 10, */ - 4, 6, 7, 8, 10, 11, 12, 14, - }; - return frq_xs_map[get_FRQ(tCK, 133) - 3]; - } + else + return frq_xs_map[0][get_FRQ(tCK, 133) - 3]; } /* Get MOD based on MC frequency */ static u8 get_MOD(u32 tCK, u8 base_freq) { - if (base_freq == 100) { - static const u8 frq_mod_map[] = { - /* FRQ: 7, 8, 9, 10, 11, 12, */ - 12, 12, 14, 15, 17, 18, - }; - return frq_mod_map[get_FRQ(tCK, 100) - 7]; + if (base_freq == 100) + return frq_mod_map[1][get_FRQ(tCK, 100) - 7]; - } else { - static const u8 frq_mod_map[] = { - /* FRQ: 3, 4, 5, 6, 7, 8, 9, 10, */ - 12, 12, 12, 12, 15, 16, 18, 20, - }; - return frq_mod_map[get_FRQ(tCK, 133) - 3]; - } + else + return frq_mod_map[0][get_FRQ(tCK, 133) - 3]; } /* Get Write Leveling Output delay based on MC frequency */ static u8 get_WLO(u32 tCK, u8 base_freq) { - if (base_freq == 100) { - static const u8 frq_wlo_map[] = { - /* FRQ: 7, 8, 9, 10, 11, 12, */ - 6, 6, 7, 8, 9, 9, - }; - return frq_wlo_map[get_FRQ(tCK, 100) - 7]; + if (base_freq == 100) + return frq_wlo_map[1][get_FRQ(tCK, 100) - 7]; - } else { - static const u8 frq_wlo_map[] = { - /* FRQ: 3, 4, 5, 6, 7, 8, 9, 10, */ - 4, 5, 6, 6, 8, 8, 9, 10, - }; - return frq_wlo_map[get_FRQ(tCK, 133) - 3]; - } + else + return frq_wlo_map[0][get_FRQ(tCK, 133) - 3]; } /* Get CKE based on MC frequency */ static u8 get_CKE(u32 tCK, u8 base_freq) { - if (base_freq == 100) { - static const u8 frq_cke_map[] = { - /* FRQ: 7, 8, 9, 10, 11, 12, */ - 4, 4, 5, 5, 6, 6, - }; - return frq_cke_map[get_FRQ(tCK, 100) - 7]; + if (base_freq == 100) + return frq_cke_map[1][get_FRQ(tCK, 100) - 7]; - } else { - static const u8 frq_cke_map[] = { - /* FRQ: 3, 4, 5, 6, 7, 8, 9, 10, */ - 3, 3, 4, 4, 5, 6, 6, 7, - }; - return frq_cke_map[get_FRQ(tCK, 133) - 3]; - } + else + return frq_cke_map[0][get_FRQ(tCK, 133) - 3]; } /* Get XPDLL based on MC frequency */ static u8 get_XPDLL(u32 tCK, u8 base_freq) { - if (base_freq == 100) { - static const u8 frq_xpdll_map[] = { - /* FRQ: 7, 8, 9, 10, 11, 12, */ - 17, 20, 22, 24, 27, 32, - }; - return frq_xpdll_map[get_FRQ(tCK, 100) - 7]; + if (base_freq == 100) + return frq_xpdll_map[1][get_FRQ(tCK, 100) - 7]; - } else { - static const u8 frq_xpdll_map[] = { - /* FRQ: 3, 4, 5, 6, 7, 8, 9, 10, */ - 10, 13, 16, 20, 23, 26, 29, 32, - }; - return frq_xpdll_map[get_FRQ(tCK, 133) - 3]; - } + else + return frq_xpdll_map[0][get_FRQ(tCK, 133) - 3]; } /* Get XP based on MC frequency */ static u8 get_XP(u32 tCK, u8 base_freq) { - if (base_freq == 100) { - static const u8 frq_xp_map[] = { - /* FRQ: 7, 8, 9, 10, 11, 12, */ - 5, 5, 6, 6, 7, 8, - }; - return frq_xp_map[get_FRQ(tCK, 100) - 7]; - } else { + if (base_freq == 100) + return frq_xp_map[1][get_FRQ(tCK, 100) - 7]; - static const u8 frq_xp_map[] = { - /* FRQ: 3, 4, 5, 6, 7, 8, 9, 10, */ - 3, 4, 4, 5, 6, 7, 8, 8 - }; - return frq_xp_map[get_FRQ(tCK, 133) - 3]; - } + else + return frq_xp_map[0][get_FRQ(tCK, 133) - 3]; } /* Get AONPD based on MC frequency */ static u8 get_AONPD(u32 tCK, u8 base_freq) { - if (base_freq == 100) { - static const u8 frq_aonpd_map[] = { - /* FRQ: 7, 8, 9, 10, 11, 12, */ - 6, 8, 8, 9, 10, 11, - }; - return frq_aonpd_map[get_FRQ(tCK, 100) - 7]; + if (base_freq == 100) + return frq_aonpd_map[1][get_FRQ(tCK, 100) - 7]; - } else { - static const u8 frq_aonpd_map[] = { - /* FRQ: 3, 4, 5, 6, 7, 8, 9, 10, */ - 4, 5, 6, 8, 8, 10, 11, 12, - }; - return frq_aonpd_map[get_FRQ(tCK, 133) - 3]; - } + else + return frq_aonpd_map[0][get_FRQ(tCK, 133) - 3]; } /* Get COMP2 based on MC frequency */ static u32 get_COMP2(u32 tCK, u8 base_freq) { - if (base_freq == 100) { - static const u32 frq_comp2_map[] = { - // FRQ: 7, 8, 9, 10, 11, 12, - 0x0CA8C264, 0x0C6671E4, 0x0C6671E4, 0x0C446964, 0x0C235924, 0x0C235924, - }; - return frq_comp2_map[get_FRQ(tCK, 100) - 7]; + if (base_freq == 100) + return frq_comp2_map[1][get_FRQ(tCK, 100) - 7]; - } else { - static const u32 frq_comp2_map[] = { - /* FRQ: 3, 4, 5, 6, */ - 0x0D6FF5E4, 0x0CEBDB64, 0x0CA8C264, 0x0C6671E4, - - /* FRQ: 7, 8, 9, 10, */ - 0x0C446964, 0x0C235924, 0x0C235924, 0x0C235924, - }; - return frq_comp2_map[get_FRQ(tCK, 133) - 3]; - } + else + return frq_comp2_map[0][get_FRQ(tCK, 133) - 3]; } static void ivb_normalize_tclk(ramctr_timing *ctrl, bool ref_100mhz_support) diff --git a/src/northbridge/intel/sandybridge/raminit_sandy.c b/src/northbridge/intel/sandybridge/raminit_sandy.c index 2ee91e8a48..29b8a7bfec 100644 --- a/src/northbridge/intel/sandybridge/raminit_sandy.c +++ b/src/northbridge/intel/sandybridge/raminit_sandy.c @@ -6,6 +6,7 @@ #include #include "raminit_native.h" #include "raminit_common.h" +#include "raminit_tables.h" /* Frequency multiplier */ static u32 get_FRQ(u32 tCK) @@ -23,91 +24,55 @@ static u32 get_FRQ(u32 tCK) /* Get REFI based on MC frequency */ static u32 get_REFI(u32 tCK) { - static const u32 frq_refi_map[] = { - /* FRQ: 3, 4, 5, 6, 7, 8, */ - 3120, 4160, 5200, 6240, 7280, 8320, - }; - return frq_refi_map[get_FRQ(tCK) - 3]; + return frq_refi_map[0][get_FRQ(tCK) - 3]; } /* Get XSOffset based on MC frequency */ static u8 get_XSOffset(u32 tCK) { - static const u8 frq_xs_map[] = { - /* FRQ: 3, 4, 5, 6, 7, 8, */ - 4, 6, 7, 8, 10, 11, - }; - return frq_xs_map[get_FRQ(tCK) - 3]; + return frq_xs_map[0][get_FRQ(tCK) - 3]; } /* Get MOD based on MC frequency */ static u8 get_MOD(u32 tCK) { - static const u8 frq_mod_map[] = { - /* FRQ: 3, 4, 5, 6, 7, 8, */ - 12, 12, 12, 12, 15, 16, - }; - return frq_mod_map[get_FRQ(tCK) - 3]; + return frq_mod_map[0][get_FRQ(tCK) - 3]; } /* Get Write Leveling Output delay based on MC frequency */ static u8 get_WLO(u32 tCK) { - static const u8 frq_wlo_map[] = { - /* FRQ: 3, 4, 5, 6, 7, 8, */ - 4, 5, 6, 6, 8, 8, - }; - return frq_wlo_map[get_FRQ(tCK) - 3]; + return frq_wlo_map[0][get_FRQ(tCK) - 3]; } /* Get CKE based on MC frequency */ static u8 get_CKE(u32 tCK) { - static const u8 frq_cke_map[] = { - /* FRQ: 3, 4, 5, 6, 7, 8, */ - 3, 3, 4, 4, 5, 6, - }; - return frq_cke_map[get_FRQ(tCK) - 3]; + return frq_cke_map[0][get_FRQ(tCK) - 3]; } /* Get XPDLL based on MC frequency */ static u8 get_XPDLL(u32 tCK) { - static const u8 frq_xpdll_map[] = { - /* FRQ: 3, 4, 5, 6, 7, 8, */ - 10, 13, 16, 20, 23, 26, - }; - return frq_xpdll_map[get_FRQ(tCK) - 3]; + return frq_xpdll_map[0][get_FRQ(tCK) - 3]; } /* Get XP based on MC frequency */ static u8 get_XP(u32 tCK) { - static const u8 frq_xp_map[] = { - /* FRQ: 3, 4, 5, 6, 7, 8, */ - 3, 4, 4, 5, 6, 7, - }; - return frq_xp_map[get_FRQ(tCK) - 3]; + return frq_xp_map[0][get_FRQ(tCK) - 3]; } /* Get AONPD based on MC frequency */ static u8 get_AONPD(u32 tCK) { - static const u8 frq_aonpd_map[] = { - /* FRQ: 3, 4, 5, 6, 7, 8, */ - 4, 5, 6, 8, 8, 10, - }; - return frq_aonpd_map[get_FRQ(tCK) - 3]; + return frq_aonpd_map[0][get_FRQ(tCK) - 3]; } /* Get COMP2 based on MC frequency */ static u32 get_COMP2(u32 tCK) { - static const u32 frq_comp2_map[] = { - /* FRQ: 3, 4, 5, 6, 7, 8, */ - 0x0D6BEDCC, 0x0CE7C34C, 0x0CA57A4C, 0x0C6369CC, 0x0C42514C, 0x0C21410C, - }; - return frq_comp2_map[get_FRQ(tCK) - 3]; + return frq_comp2_map[0][get_FRQ(tCK) - 3]; } static void snb_normalize_tclk(u32 *tclk) diff --git a/src/northbridge/intel/sandybridge/raminit_tables.c b/src/northbridge/intel/sandybridge/raminit_tables.c index 1ecba1b935..67dbd2ba14 100644 --- a/src/northbridge/intel/sandybridge/raminit_tables.c +++ b/src/northbridge/intel/sandybridge/raminit_tables.c @@ -3,6 +3,111 @@ #include "raminit_tables.h" +const u32 frq_refi_map[2][8] = { + { /* 133 MHz */ + /* FRQ: 3, 4, 5, 6, 7, 8, 9, 10, */ + 3120, 4160, 5200, 6240, 7280, 8320, 9360, 10400, + }, + { /* 100 MHz */ + /* FRQ: 7, 8, 9, 10, 11, 12, N/A, N/A, */ + 5460, 6240, 7020, 7800, 8580, 9360, 0, 0, + }, +}; + +const u8 frq_xs_map[2][8] = { + { /* 133 MHz */ + /* FRQ: 3, 4, 5, 6, 7, 8, 9, 10, */ + 4, 6, 7, 8, 10, 11, 12, 14, + }, + { /* 100 MHz */ + /* FRQ: 7, 8, 9, 10, 11, 12, NA, NA, */ + 7, 8, 9, 10, 11, 12, 0, 0, + }, +}; + +const u8 frq_mod_map[2][8] = { + { /* 133 MHz */ + /* FRQ: 3, 4, 5, 6, 7, 8, 9, 10, */ + 12, 12, 12, 12, 15, 16, 18, 20, + }, + { /* 100 MHz */ + /* FRQ: 7, 8, 9, 10, 11, 12, NA, NA, */ + 12, 12, 14, 15, 17, 18, 0, 0, + }, +}; + +const u8 frq_wlo_map[2][8] = { + { /* 133 MHz */ + /* FRQ: 3, 4, 5, 6, 7, 8, 9, 10, */ + 4, 5, 6, 6, 8, 8, 9, 10, + }, + { /* 100 MHz */ + /* FRQ: 7, 8, 9, 10, 11, 12, NA, NA, */ + 6, 6, 7, 8, 9, 9, 0, 0, + }, +}; + +const u8 frq_cke_map[2][8] = { + { /* 133 MHz */ + /* FRQ: 3, 4, 5, 6, 7, 8, 9, 10, */ + 3, 3, 4, 4, 5, 6, 6, 7, + }, + { /* 100 MHz */ + /* FRQ: 7, 8, 9, 10, 11, 12, NA, NA, */ + 4, 4, 5, 5, 6, 6, 0, 0, + }, +}; + +const u8 frq_xpdll_map[2][8] = { + { /* 133 MHz */ + /* FRQ: 3, 4, 5, 6, 7, 8, 9, 10, */ + 10, 13, 16, 20, 23, 26, 29, 32, + }, + { /* 100 MHz */ + /* FRQ: 7, 8, 9, 10, 11, 12, NA, NA, */ + 17, 20, 22, 24, 27, 32, 0, 0, + }, +}; + +const u8 frq_xp_map[2][8] = { + { /* 133 MHz */ + /* FRQ: 3, 4, 5, 6, 7, 8, 9, 10, */ + 3, 4, 4, 5, 6, 7, 8, 8, + }, + { /* 100 MHz */ + /* FRQ: 7, 8, 9, 10, 11, 12, NA, NA, */ + 5, 5, 6, 6, 7, 8, 0, 0, + }, +}; + +const u8 frq_aonpd_map[2][8] = { + { /* 133 MHz */ + /* FRQ: 3, 4, 5, 6, 7, 8, 9, 10, */ + 4, 5, 6, 8, 8, 10, 11, 12, + }, + { /* 100 MHz */ + /* FRQ: 7, 8, 9, 10, 11, 12, NA, NA, */ + 6, 8, 8, 9, 10, 11, 0, 0, + }, +}; + +const u32 frq_comp2_map[2][8] = { + { /* 133 MHz */ + /* FRQ: 7, 8, 9, 10, */ + 0x0CA8C264, 0x0C6671E4, 0x0C6671E4, 0x0C446964, + + /* FRQ: 11, 12, N/A, N/A, */ + 0x0C235924, 0x0C235924, 0, 0, + }, + { /* 100 MHz */ + /* FRQ: 3, 4, 5, 6, */ + 0x0D6FF5E4, 0x0CEBDB64, 0x0CA8C264, 0x0C6671E4, + + /* FRQ: 7, 8, 9, 10, */ + 0x0C446964, 0x0C235924, 0x0C235924, 0x0C235924, + }, +}; + const u32 pattern[32][16] = { {0x00000000, 0x00000000, 0xffffffff, 0xffffffff, 0x00000000, 0x00000000, 0xffffffff, 0xffffffff, diff --git a/src/northbridge/intel/sandybridge/raminit_tables.h b/src/northbridge/intel/sandybridge/raminit_tables.h index 4e225552c3..e5cf589b70 100644 --- a/src/northbridge/intel/sandybridge/raminit_tables.h +++ b/src/northbridge/intel/sandybridge/raminit_tables.h @@ -6,6 +6,26 @@ #include +extern const u32 frq_refi_map[2][8]; + +extern const u8 frq_xs_map[2][8]; + +extern const u8 frq_mod_map[2][8]; + +extern const u8 frq_wlo_map[2][8]; + +extern const u8 frq_cke_map[2][8]; + +extern const u8 frq_xpdll_map[2][8]; + +extern const u8 frq_xp_map[2][8]; + +extern const u8 frq_aonpd_map[2][8]; + +extern const u32 frq_comp2_map[2][8]; + + + extern const u32 pattern[32][16]; extern const u8 use_base[63][32]; -- cgit v1.2.3