From 805ff571e3ba01f1935da9d5c72d00fd12d020ad Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Thu, 29 Oct 2020 21:52:00 +0100 Subject: nb/intel/haswell: Drop incorrect MMIO_PAVP_MSG write This write was copied from Sandy Bridge. Neither Haswell reference code nor Broadwell perform this write. Therefore, it seems safe to remove it. Change-Id: I8869ff3e66362d9910235c554c3a07e91f479a82 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/46994 Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- src/northbridge/intel/haswell/northbridge.c | 3 --- 1 file changed, 3 deletions(-) (limited to 'src/northbridge') diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c index c59dce792f..130c0ff8ac 100644 --- a/src/northbridge/intel/haswell/northbridge.c +++ b/src/northbridge/intel/haswell/northbridge.c @@ -547,9 +547,6 @@ static void northbridge_init(struct device *dev) /* Configure turbo power limits 1ms after reset complete bit. */ mdelay(1); set_power_limits(28); - - /* Set here before graphics PM init. */ - MCHBAR32(MMIO_PAVP_MSG) = 0x00100001; } static struct device_operations mc_ops = { -- cgit v1.2.3