From 7c789702149a893d0c82c57edbb8705e9f6f95e9 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Fri, 16 Jun 2017 23:36:46 -0500 Subject: nb/haswell: set ASLB gnvs to OpRegion ACPI memory address The ALSB gnvs variable is used to load the OpRegion memory address into the ASLS register on the S3 resume path, and must therefore first be set on the normal boot path. This patch brings Haswell in line with SNB/IVB/Nehalem, which already save the OpRegion address in ASLB. Change-Id: Ie062cbfe7e7f60c2a4e2b9111f6b6da87ced7a39 Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/20254 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph --- src/northbridge/intel/haswell/gma.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'src/northbridge') diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c index 76da5a0080..f22ff48707 100644 --- a/src/northbridge/intel/haswell/gma.c +++ b/src/northbridge/intel/haswell/gma.c @@ -14,6 +14,7 @@ */ #include +#include #include #include #include @@ -24,6 +25,7 @@ #include #include #include +#include #include #include @@ -514,12 +516,22 @@ gma_write_acpi_tables(struct device *const dev, struct acpi_rsdp *const rsdp) { igd_opregion_t *opregion = (igd_opregion_t *)current; + global_nvs_t *gnvs; if (init_igd_opregion(opregion) != CB_SUCCESS) return current; current += sizeof(igd_opregion_t); + /* GNVS has been already set up */ + gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); + if (gnvs) { + /* IGD OpRegion Base Address */ + gnvs->aslb = (u32)(uintptr_t)opregion; + } else { + printk(BIOS_ERR, "Error: GNVS table not found.\n"); + } + gma_enable_swsci(); current = acpi_align_current(current); -- cgit v1.2.3