From 77e45d3eccc5cf82a2b4d4d1cd47654dec1962b4 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Sun, 28 Feb 2016 16:14:45 +0100 Subject: nb/intel/sandybridge/raminit: Make discover_timC_write non cyclic The code can't handle cyclic zero runs. Make sure it will never wrap around by setting the top-most bit to constant one. Fixes "Mini channel test failed (2)". Test system: * Gigabyte GA-B75M-D3H * Intel Pentium CPU G2130 Change-Id: I55e610d984d564bd4675f9318dead6d6c1e288a3 Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/13853 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/northbridge/intel/sandybridge/raminit.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'src/northbridge') diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index b81860264d..65282d2848 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -3435,9 +3435,12 @@ static void discover_timC_write(ramctr_timing * ctrl) u32 raw_statistics[MAX_TIMC + 1]; int statistics[MAX_TIMC + 1]; + /* Make sure rn.start < rn.end */ + statistics[MAX_TIMC] = 1; + fill_pattern5(ctrl, channel, pat); write32(DEFAULT_MCHBAR + 0x4288 + 0x400 * channel, 0x1f); - for (timC = 0; timC < MAX_TIMC + 1; timC++) { + for (timC = 0; timC < MAX_TIMC; timC++) { FOR_ALL_LANES ctrl->timings[channel][slotrank].lanes[lane].timC = timC; program_timings(ctrl, channel); @@ -3449,10 +3452,11 @@ static void discover_timC_write(ramctr_timing * ctrl) } FOR_ALL_LANES { struct run rn; - for (timC = 0; timC <= MAX_TIMC; timC++) + for (timC = 0; timC < MAX_TIMC; timC++) statistics[timC] = !!(raw_statistics[timC] & (1 << lane)); + rn = get_longest_zero_run(statistics, MAX_TIMC + 1); if (rn.all) -- cgit v1.2.3